summaryrefslogtreecommitdiffstats
path: root/meta/packages/gcc/gcc-3.4.4/gcc34-arm-ldm-peephole.patch
blob: 92ad25d09c883eb86270c700589aaedf87f1723f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
--- gcc-3.4.0/gcc/config/arm/arm.md.arm-ldm-peephole	2004-01-13 08:24:37.000000000 -0500
+++ gcc-3.4.0/gcc/config/arm/arm.md	2004-04-24 18:18:04.000000000 -0400
@@ -8810,13 +8810,16 @@
    (set_attr "length" "4,8,8")]
 )
 
+; Try to convert LDR+LDR+arith into [add+]LDM+arith
+; On XScale, LDM is always slower than two LDRs, so only do this if
+; optimising for size.
 (define_insn "*arith_adjacentmem"
   [(set (match_operand:SI 0 "s_register_operand" "=r")
 	(match_operator:SI 1 "shiftable_operator"
 	 [(match_operand:SI 2 "memory_operand" "m")
 	  (match_operand:SI 3 "memory_operand" "m")]))
    (clobber (match_scratch:SI 4 "=r"))]
-  "TARGET_ARM && adjacent_mem_locations (operands[2], operands[3])"
+  "TARGET_ARM && (!arm_tune_xscale || optimize_size) && adjacent_mem_locations (operands[2], operands[3])"
   "*
   {
     rtx ldm[3];
@@ -8851,6 +8854,8 @@
       }
    if (val1 && val2)
       {
+	/* This would be a loss on a Harvard core, but adjacent_mem_locations()
+	   will prevent it from happening.  */
 	rtx ops[3];
 	ldm[0] = ops[0] = operands[4];
 	ops[1] = XEXP (XEXP (operands[2], 0), 0);
--- gcc-3.4.0/gcc/genpeep.c.arm-ldm-peephole	2003-07-05 01:27:22.000000000 -0400
+++ gcc-3.4.0/gcc/genpeep.c	2004-04-24 18:18:04.000000000 -0400
@@ -381,6 +381,7 @@
   printf ("#include \"recog.h\"\n");
   printf ("#include \"except.h\"\n\n");
   printf ("#include \"function.h\"\n\n");
+  printf ("#include \"flags.h\"\n\n");
 
   printf ("#ifdef HAVE_peephole\n");
   printf ("extern rtx peep_operand[];\n\n");
--- gcc/gcc/config/arm/arm.c.orig	2005-06-02 22:40:40.000000000 +0100
+++ gcc/gcc/config/arm/arm.c	2005-06-02 22:45:45.000000000 +0100
@@ -4610,9 +4610,12 @@
       if (arm_eliminable_register (reg0))
 	return 0;
 
+      /* For Harvard cores, only accept pairs where one offset is zero.
+         See comment in load_multiple_sequence.  */
       val_diff = val1 - val0;
       return ((REGNO (reg0) == REGNO (reg1))
-	      && (val_diff == 4 || val_diff == -4));
+	      && (val_diff == 4 || val_diff == -4))
+      	      && (!arm_ld_sched || val0 == 0 || val1 == 0);
     }
 
   return 0;
@@ -4857,6 +4860,11 @@
       *load_offset = unsorted_offsets[order[0]];
     }
 
+  /* For XScale a two-word LDM is a performance loss, so only do this if
+     size is more important.  See comments in arm_gen_load_multiple.  */
+  if (nops == 2 && arm_tune_xscale && !optimize_size)
+    return 0;
+
   if (unsorted_offsets[order[0]] == 0)
     return 1; /* ldmia */
 
@@ -5083,6 +5091,11 @@
       *load_offset = unsorted_offsets[order[0]];
     }
 
+  /* For XScale a two-word LDM is a performance loss, so only do this if
+     size is more important.  See comments in arm_gen_load_multiple.  */
+  if (nops == 2 && arm_tune_xscale && !optimize_size)
+    return 0;
+
   if (unsorted_offsets[order[0]] == 0)
     return 1; /* stmia */