diff options
Diffstat (limited to 'meta/recipes-devtools/gcc/gcc')
31 files changed, 3846 insertions, 356 deletions
diff --git a/meta/recipes-devtools/gcc/gcc/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch b/meta/recipes-devtools/gcc/gcc/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch index 66e582ca98..5c75698eda 100644 --- a/meta/recipes-devtools/gcc/gcc/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch +++ b/meta/recipes-devtools/gcc/gcc/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch @@ -1,4 +1,4 @@ -From 31f94ef5b43a984a98f0eebd2dcf1b53aa1d7bce Mon Sep 17 00:00:00 2001 +From 553564bdcabdcc5d4cc4de73c7eb94c505ef51f5 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 08:37:11 +0400 Subject: [PATCH] gcc-4.3.1: ARCH_FLAGS_FOR_TARGET @@ -12,10 +12,10 @@ Upstream-Status: Inappropriate [embedded specific] 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configure b/configure -index 5dcaab14ae9..f76310a36bb 100755 +index 117a7ef23f2..535265253fd 100755 --- a/configure +++ b/configure -@@ -10165,7 +10165,7 @@ fi +@@ -10195,7 +10195,7 @@ fi # for target_alias and gcc doesn't manage it consistently. target_configargs="--cache-file=./config.cache ${target_configargs}" @@ -25,10 +25,10 @@ index 5dcaab14ae9..f76310a36bb 100755 *" newlib "*) case " $target_configargs " in diff --git a/configure.ac b/configure.ac -index 85977482aee..8b9097c7a45 100644 +index b3e9bbd2aa5..5ac8d6490f6 100644 --- a/configure.ac +++ b/configure.ac -@@ -3346,7 +3346,7 @@ fi +@@ -3351,7 +3351,7 @@ fi # for target_alias and gcc doesn't manage it consistently. target_configargs="--cache-file=./config.cache ${target_configargs}" diff --git a/meta/recipes-devtools/gcc/gcc/0002-gcc-poison-system-directories.patch b/meta/recipes-devtools/gcc/gcc/0002-gcc-poison-system-directories.patch index 5a51ae7d96..492300047d 100644 --- a/meta/recipes-devtools/gcc/gcc/0002-gcc-poison-system-directories.patch +++ b/meta/recipes-devtools/gcc/gcc/0002-gcc-poison-system-directories.patch @@ -1,4 +1,4 @@ -From e1dbdcd0ea667bab4b551294354e04c6fe288ab6 Mon Sep 17 00:00:00 2001 +From 52676b5934ba127c3af39fc484c8236c8fa60b96 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Mon, 8 Mar 2021 16:04:20 -0800 Subject: [PATCH] gcc: poison-system-directories @@ -11,7 +11,7 @@ aborted. Instead, we add the two missing items to the current scan. If the user wants this to be a failure, they can add "-Werror=poison-system-directories". -Upstream-Status: Pending +Upstream-Status: Inappropriate [OE configuration] Signed-off-by: Mark Hatle <mark.hatle@windriver.com> Signed-off-by: Khem Raj <raj.khem@gmail.com> --- @@ -25,10 +25,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 7 files changed, 86 insertions(+), 2 deletions(-) diff --git a/gcc/common.opt b/gcc/common.opt -index 8a0dafc522d..0357868e22c 100644 +index 862c474d3c8..64c4277c991 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -710,6 +710,10 @@ Wreturn-local-addr +@@ -711,6 +711,10 @@ Wreturn-local-addr Common Var(warn_return_local_addr) Init(1) Warning Warn about returning a pointer/reference to a local or temporary variable. @@ -40,10 +40,10 @@ index 8a0dafc522d..0357868e22c 100644 Common Var(warn_shadow) Warning Warn when one variable shadows another. Same as -Wshadow=global. diff --git a/gcc/config.in b/gcc/config.in -index 64c27c9cfac..a693cb8a886 100644 +index 4cad077bfbe..80e832fdb84 100644 --- a/gcc/config.in +++ b/gcc/config.in -@@ -230,6 +230,16 @@ +@@ -236,6 +236,16 @@ #endif @@ -61,10 +61,10 @@ index 64c27c9cfac..a693cb8a886 100644 optimizer and back end) to be checked for dynamic type safety at runtime. This is quite expensive. */ diff --git a/gcc/configure b/gcc/configure -index 5ce0557719a..dc2d59701ad 100755 +index c7b26d1927d..3508be7b439 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -1023,6 +1023,7 @@ enable_maintainer_mode +@@ -1026,6 +1026,7 @@ enable_maintainer_mode enable_link_mutex enable_link_serialization enable_version_specific_runtime_libs @@ -72,7 +72,7 @@ index 5ce0557719a..dc2d59701ad 100755 enable_plugin enable_host_shared enable_libquadmath_support -@@ -1785,6 +1786,8 @@ Optional Features: +@@ -1788,6 +1789,8 @@ Optional Features: --enable-version-specific-runtime-libs specify that runtime libraries should be installed in a compiler-specific directory @@ -81,7 +81,7 @@ index 5ce0557719a..dc2d59701ad 100755 --enable-plugin enable plugin support --enable-host-shared build host code as shared libraries --disable-libquadmath-support -@@ -31982,6 +31985,22 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : +@@ -31753,6 +31756,22 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : fi @@ -105,10 +105,10 @@ index 5ce0557719a..dc2d59701ad 100755 diff --git a/gcc/configure.ac b/gcc/configure.ac -index 23bee7010a3..36ce78924de 100644 +index 09082e8ccae..6cd01a8966b 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7421,6 +7421,22 @@ AC_ARG_ENABLE(version-specific-runtime-libs, +@@ -7292,6 +7292,22 @@ AC_ARG_ENABLE(version-specific-runtime-libs, [specify that runtime libraries should be installed in a compiler-specific directory])]) @@ -132,37 +132,37 @@ index 23bee7010a3..36ce78924de 100644 AC_SUBST(subdirs) AC_SUBST(srcdir) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index 07b440190c3..b2de464798a 100644 +index de40f62e219..d6f203c8b71 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -379,6 +379,7 @@ Objective-C and Objective-C++ Dialects}. - -Wpacked -Wno-packed-bitfield-compat -Wpacked-not-aligned -Wpadded @gol - -Wparentheses -Wno-pedantic-ms-format @gol - -Wpointer-arith -Wno-pointer-compare -Wno-pointer-to-int-cast @gol -+-Wno-poison-system-directories @gol - -Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls @gol - -Wrestrict -Wno-return-local-addr -Wreturn-type @gol - -Wno-scalar-storage-order -Wsequence-point @gol -@@ -8029,6 +8030,14 @@ made up of data only and thus requires no special treatment. But, for +@@ -384,6 +384,7 @@ Objective-C and Objective-C++ Dialects}. + -Wpacked -Wno-packed-bitfield-compat -Wpacked-not-aligned -Wpadded + -Wparentheses -Wno-pedantic-ms-format + -Wpointer-arith -Wno-pointer-compare -Wno-pointer-to-int-cast ++-Wno-poison-system-directories + -Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls + -Wrestrict -Wno-return-local-addr -Wreturn-type + -Wno-scalar-storage-order -Wsequence-point +@@ -8426,6 +8427,14 @@ made up of data only and thus requires no special treatment. But, for most targets, it is made up of code and thus requires the stack to be made executable in order for the program to work properly. -+@item -Wno-poison-system-directories +@opindex Wno-poison-system-directories ++@item -Wno-poison-system-directories +Do not warn for @option{-I} or @option{-L} options using system +directories such as @file{/usr/include} when cross compiling. This +option is intended for use in chroot environments when such +directories contain the correct headers and libraries for the target +system rather than the host. + - @item -Wfloat-equal @opindex Wfloat-equal @opindex Wno-float-equal + @item -Wfloat-equal diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index bb07cc244e3..ce161d3c853 100644 +index 16bb07f2cdc..5feae021545 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1159,6 +1159,8 @@ proper position among the other output files. */ +@@ -1146,6 +1146,8 @@ proper position among the other output files. */ "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \ "%X %{o*} %{e*} %{N} %{n} %{r}\ %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \ @@ -171,7 +171,7 @@ index bb07cc244e3..ce161d3c853 100644 %{static|no-pie|static-pie:} %@{L*} %(mfwrap) %(link_libgcc) " \ VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \ %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\ -@@ -1254,8 +1256,11 @@ static const char *cpp_unique_options = +@@ -1241,8 +1243,11 @@ static const char *cpp_unique_options = static const char *cpp_options = "%(cpp_unique_options) %1 %{m*} %{std*&ansi&trigraphs} %{W*&pedantic*} %{w}\ %{f*} %{g*:%{%:debug-level-gt(0):%{g*}\ @@ -186,7 +186,7 @@ index bb07cc244e3..ce161d3c853 100644 /* Pass -d* flags, possibly modifying -dumpdir, -dumpbase et al. diff --git a/gcc/incpath.cc b/gcc/incpath.cc -index bd2a97938eb..c80f100f476 100644 +index 4d44321183f..46c0d543205 100644 --- a/gcc/incpath.cc +++ b/gcc/incpath.cc @@ -26,6 +26,7 @@ @@ -208,17 +208,17 @@ index bd2a97938eb..c80f100f476 100644 + struct cpp_dir *p; + + for (p = heads[INC_QUOTE]; p; p = p->next) -+ { -+ if ((!strncmp (p->name, "/usr/include", 12)) -+ || (!strncmp (p->name, "/usr/local/include", 18)) -+ || (!strncmp (p->name, "/usr/X11R6/include", 18)) -+ || (!strncmp (p->name, "/sw/include", 11)) -+ || (!strncmp (p->name, "/opt/include", 12))) -+ warning (OPT_Wpoison_system_directories, -+ "include location \"%s\" is unsafe for " -+ "cross-compilation", -+ p->name); -+ } ++ { ++ if ((!strncmp (p->name, "/usr/include", 12)) ++ || (!strncmp (p->name, "/usr/local/include", 18)) ++ || (!strncmp (p->name, "/usr/X11R6/include", 18)) ++ || (!strncmp (p->name, "/sw/include", 11)) ++ || (!strncmp (p->name, "/opt/include", 12))) ++ warning (OPT_Wpoison_system_directories, ++ "include location \"%s\" is unsafe for " ++ "cross-compilation", ++ p->name); ++ } + } +#endif } diff --git a/meta/recipes-devtools/gcc/gcc/0003-64-bit-multilib-hack.patch b/meta/recipes-devtools/gcc/gcc/0003-64-bit-multilib-hack.patch index e83f05b8aa..69e7fa0ba9 100644 --- a/meta/recipes-devtools/gcc/gcc/0003-64-bit-multilib-hack.patch +++ b/meta/recipes-devtools/gcc/gcc/0003-64-bit-multilib-hack.patch @@ -1,7 +1,7 @@ -From 34b861e7a4cfd7b1f0d2c0f8cf9bb0b0b81eb61a Mon Sep 17 00:00:00 2001 +From febfac59d0e8a864370d0b4018b4e497ceec156d Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:10:06 +0400 -Subject: [PATCH] 64-bit multilib hack. +Subject: [PATCH] 64-bit multilib hack GCC has internal multilib handling code but it assumes a very specific rigid directory layout. The build system implementation of multilib layout is very generic and allows @@ -28,18 +28,19 @@ Upstream-Status: Inappropriate [OE-Specific] Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Elvis Dowson <elvis.dowson@gmail.com> Signed-off-by: Mark Hatle <mark.hatle@windriver.com> -Signed-off-by: Khem Raj <raj.khem@gmail.com> +Signed-off-by: Zang Ruochen <zangruochen@loongson.cn> --- gcc/config/aarch64/t-aarch64-linux | 8 ++++---- gcc/config/arc/t-multilib-linux | 4 ++-- gcc/config/i386/t-linux64 | 6 ++---- - gcc/config/mips/t-linux64 | 10 +++------- - gcc/config/riscv/t-linux | 6 ++++-- + gcc/config/mips/t-linux64 | 28 ++-------------------------- + gcc/config/riscv/t-linux | 4 ++-- gcc/config/rs6000/t-linux64 | 5 ++--- - 6 files changed, 17 insertions(+), 22 deletions(-) + gcc/config/loongarch/t-linux | 34 ++++++++++++++++++---------------- + 7 files changed, 32 insertions(+), 57 deletions(-) diff --git a/gcc/config/aarch64/t-aarch64-linux b/gcc/config/aarch64/t-aarch64-linux -index d0cd546002a..f4056d68372 100644 +index 57bf4100fcd..aaef5da8059 100644 --- a/gcc/config/aarch64/t-aarch64-linux +++ b/gcc/config/aarch64/t-aarch64-linux @@ -21,8 +21,8 @@ @@ -56,7 +57,7 @@ index d0cd546002a..f4056d68372 100644 -MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu_ilp32) +#MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu_ilp32) diff --git a/gcc/config/arc/t-multilib-linux b/gcc/config/arc/t-multilib-linux -index ecb9ae6859f..12a164028d4 100644 +index a839e4ea67c..f92664573a9 100644 --- a/gcc/config/arc/t-multilib-linux +++ b/gcc/config/arc/t-multilib-linux @@ -16,9 +16,9 @@ @@ -72,7 +73,7 @@ index ecb9ae6859f..12a164028d4 100644 # Aliases: MULTILIB_MATCHES += mcpu?arc700=mA7 diff --git a/gcc/config/i386/t-linux64 b/gcc/config/i386/t-linux64 -index 5526ad0e6cc..fa51c88912b 100644 +index 138956b0962..d6e0cdc4342 100644 --- a/gcc/config/i386/t-linux64 +++ b/gcc/config/i386/t-linux64 @@ -32,7 +32,5 @@ @@ -86,37 +87,53 @@ index 5526ad0e6cc..fa51c88912b 100644 +MULTILIB_DIRNAMES = . . +MULTILIB_OSDIRNAMES = ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) diff --git a/gcc/config/mips/t-linux64 b/gcc/config/mips/t-linux64 -index 2fdd8e00407..04f2099250f 100644 +index 176091cabb6..8258ef40559 100644 --- a/gcc/config/mips/t-linux64 +++ b/gcc/config/mips/t-linux64 -@@ -17,10 +17,6 @@ +@@ -17,29 +17,5 @@ # <http://www.gnu.org/licenses/>. MULTILIB_OPTIONS = mabi=n32/mabi=32/mabi=64 -MULTILIB_DIRNAMES = n32 32 64 -MIPS_EL = $(if $(filter %el, $(firstword $(subst -, ,$(target)))),el) -MIPS_SOFT = $(if $(strip $(filter MASK_SOFT_FLOAT_ABI, $(target_cpu_default)) $(filter soft, $(with_float))),soft) --MULTILIB_OSDIRNAMES = \ +-ifeq (yes,$(enable_multiarch)) +- ifneq (,$(findstring gnuabi64,$(target))) +- MULTILIB_OSDIRNAMES = \ +- ../lib32$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ +- ../libo32$(call if_multiarch,:mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ +- ../lib$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) +- else ifneq (,$(findstring gnuabin32,$(target))) +- MULTILIB_OSDIRNAMES = \ +- ../lib$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ +- ../libo32$(call if_multiarch,:mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ +- ../lib64$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) +- else +- MULTILIB_OSDIRNAMES = \ - ../lib32$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ - ../lib$(call if_multiarch,:mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ - ../lib64$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) +- endif +-else +- MULTILIB_OSDIRNAMES = \ +- ../lib32$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ +- ../lib$(call if_multiarch,:mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ +- ../lib64$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) +-endif +MULTILIB_DIRNAMES = . . . +MULTILIB_OSDIRNAMES = ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) -+ diff --git a/gcc/config/riscv/t-linux b/gcc/config/riscv/t-linux -index 216d2776a18..e4d817621fc 100644 +index 216d2776a18..e3c520f4bf6 100644 --- a/gcc/config/riscv/t-linux +++ b/gcc/config/riscv/t-linux -@@ -1,3 +1,5 @@ +@@ -1,3 +1,3 @@ # Only XLEN and ABI affect Linux multilib dir names, e.g. /lib32/ilp32d/ -MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib64,$(MULTILIB_DIRNAMES))) -MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES)) +#MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib64,$(MULTILIB_DIRNAMES))) -+MULTILIB_DIRNAMES := . . +#MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES)) -+MULTILIB_OSDIRNAMES := ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) diff --git a/gcc/config/rs6000/t-linux64 b/gcc/config/rs6000/t-linux64 -index 47e0efd5764..05f5a3f188e 100644 +index 01a94242308..1429eceaebf 100644 --- a/gcc/config/rs6000/t-linux64 +++ b/gcc/config/rs6000/t-linux64 @@ -26,10 +26,9 @@ @@ -132,3 +149,53 @@ index 47e0efd5764..05f5a3f188e 100644 rs6000-linux.o: $(srcdir)/config/rs6000/rs6000-linux.cc $(COMPILE) $< +diff --git a/gcc/config/loongarch/t-linux b/gcc/config/loongarch/t-linux +index e40da1792..0c7ec9f8a 100644 +--- a/gcc/config/loongarch/t-linux ++++ b/gcc/config/loongarch/t-linux +@@ -18,7 +18,9 @@ + + # Multilib + MULTILIB_OPTIONS = mabi=lp64d/mabi=lp64f/mabi=lp64s +-MULTILIB_DIRNAMES = base/lp64d base/lp64f base/lp64s ++#MULTILIB_DIRNAMES = base/lp64d base/lp64f base/lp64s ++MULTILIB_DIRNAMES = . . . ++MULTILIB_OSDIRNAMES = ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) + + # The GCC driver always gets all abi-related options on the command line. + # (see loongarch-driver.c:driver_get_normalized_m_opts) +@@ -36,18 +38,18 @@ else + endif + + # Don't define MULTILIB_OSDIRNAMES if multilib is disabled. +-ifeq ($(filter LA_DISABLE_MULTILIB,$(tm_defines)),) +- +- MULTILIB_OSDIRNAMES = \ +- mabi.lp64d=../lib64$\ +- $(call if_multiarch,:loongarch64-linux-gnu) +- +- MULTILIB_OSDIRNAMES += \ +- mabi.lp64f=../lib64/f32$\ +- $(call if_multiarch,:loongarch64-linux-gnuf32) +- +- MULTILIB_OSDIRNAMES += \ +- mabi.lp64s=../lib64/sf$\ +- $(call if_multiarch,:loongarch64-linux-gnusf) +- +-endif ++#ifeq ($(filter LA_DISABLE_MULTILIB,$(tm_defines)),) ++# ++# MULTILIB_OSDIRNAMES = \ ++# mabi.lp64d=../lib64$\ ++# $(call if_multiarch,:loongarch64-linux-gnu) ++# ++# MULTILIB_OSDIRNAMES += \ ++# mabi.lp64f=../lib64/f32$\ ++# $(call if_multiarch,:loongarch64-linux-gnuf32) ++# ++# MULTILIB_OSDIRNAMES += \ ++# mabi.lp64s=../lib64/sf$\ ++# $(call if_multiarch,:loongarch64-linux-gnusf) ++# ++#endif + diff --git a/meta/recipes-devtools/gcc/gcc/0004-Pass-CXXFLAGS_FOR_BUILD-in-a-couple-of-places-to-avo.patch b/meta/recipes-devtools/gcc/gcc/0004-Pass-CXXFLAGS_FOR_BUILD-in-a-couple-of-places-to-avo.patch index e8f2163476..7e33bf17b0 100644 --- a/meta/recipes-devtools/gcc/gcc/0004-Pass-CXXFLAGS_FOR_BUILD-in-a-couple-of-places-to-avo.patch +++ b/meta/recipes-devtools/gcc/gcc/0004-Pass-CXXFLAGS_FOR_BUILD-in-a-couple-of-places-to-avo.patch @@ -1,4 +1,4 @@ -From 7f40f8321fb999e9b34d948724517d3fb0d26820 Mon Sep 17 00:00:00 2001 +From 6fbf920ccde6efc2d0caafde996d9e5738a1ba37 Mon Sep 17 00:00:00 2001 From: Richard Purdie <richard.purdie@linuxfoundation.org> Date: Thu, 28 Oct 2021 11:33:40 +0100 Subject: [PATCH] Pass CXXFLAGS_FOR_BUILD in a couple of places to avoid these @@ -13,7 +13,7 @@ ChangeLog: * Makefile.in: Regenerate. * Makefile.tpl: Add missing CXXFLAGS_FOR_BUILD overrides -Upstream-Status: Pending [should be submittable] +Upstream-Status: Submitted [https://gcc.gnu.org/pipermail/gcc-patches/2023-February/612560.html] Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org> Signed-off-by: Khem Raj <raj.khem@gmail.com> @@ -23,10 +23,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 2 files changed, 4 insertions(+) diff --git a/Makefile.in b/Makefile.in -index 593495e1650..1d9c83cc566 100644 +index 06a9398e172..4b0069b257c 100644 --- a/Makefile.in +++ b/Makefile.in -@@ -176,6 +176,7 @@ BUILD_EXPORTS = \ +@@ -178,6 +178,7 @@ BUILD_EXPORTS = \ # built for the build system to override those in BASE_FLAGS_TO_PASS. EXTRA_BUILD_FLAGS = \ CFLAGS="$(CFLAGS_FOR_BUILD)" \ @@ -34,7 +34,7 @@ index 593495e1650..1d9c83cc566 100644 LDFLAGS="$(LDFLAGS_FOR_BUILD)" # This is the list of directories to built for the host system. -@@ -207,6 +208,7 @@ HOST_EXPORTS = \ +@@ -210,6 +211,7 @@ HOST_EXPORTS = \ CPP_FOR_BUILD="$(CPP_FOR_BUILD)"; export CPP_FOR_BUILD; \ CPPFLAGS_FOR_BUILD="$(CPPFLAGS_FOR_BUILD)"; export CPPFLAGS_FOR_BUILD; \ CXX_FOR_BUILD="$(CXX_FOR_BUILD)"; export CXX_FOR_BUILD; \ @@ -43,10 +43,10 @@ index 593495e1650..1d9c83cc566 100644 DSYMUTIL="$(DSYMUTIL)"; export DSYMUTIL; \ LD="$(LD)"; export LD; \ diff --git a/Makefile.tpl b/Makefile.tpl -index ef58fac2b9a..bab04f335c2 100644 +index dfbd74b68f8..419b332953b 100644 --- a/Makefile.tpl +++ b/Makefile.tpl -@@ -179,6 +179,7 @@ BUILD_EXPORTS = \ +@@ -181,6 +181,7 @@ BUILD_EXPORTS = \ # built for the build system to override those in BASE_FLAGS_TO_PASS. EXTRA_BUILD_FLAGS = \ CFLAGS="$(CFLAGS_FOR_BUILD)" \ @@ -54,7 +54,7 @@ index ef58fac2b9a..bab04f335c2 100644 LDFLAGS="$(LDFLAGS_FOR_BUILD)" # This is the list of directories to built for the host system. -@@ -210,6 +211,7 @@ HOST_EXPORTS = \ +@@ -213,6 +214,7 @@ HOST_EXPORTS = \ CPP_FOR_BUILD="$(CPP_FOR_BUILD)"; export CPP_FOR_BUILD; \ CPPFLAGS_FOR_BUILD="$(CPPFLAGS_FOR_BUILD)"; export CPPFLAGS_FOR_BUILD; \ CXX_FOR_BUILD="$(CXX_FOR_BUILD)"; export CXX_FOR_BUILD; \ diff --git a/meta/recipes-devtools/gcc/gcc/0005-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch b/meta/recipes-devtools/gcc/gcc/0005-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch index e34eb2cf3f..db2fea3d16 100644 --- a/meta/recipes-devtools/gcc/gcc/0005-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch +++ b/meta/recipes-devtools/gcc/gcc/0005-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch @@ -1,4 +1,4 @@ -From 5455fc1de74897a27c1199dc5611ec02243e24af Mon Sep 17 00:00:00 2001 +From 2cedf13819c0cc929660072d8a972f5e422f9701 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:17:25 +0400 Subject: [PATCH] Use the defaults.h in ${B} instead of ${S}, and t-oe in ${B} @@ -7,16 +7,16 @@ Use the defaults.h in ${B} instead of ${S}, and t-oe in ${B}, so that the source can be shared between gcc-cross-initial, gcc-cross-intermediate, gcc-cross, gcc-runtime, and also the sdk build. -Signed-off-by: Khem Raj <raj.khem@gmail.com> - -Upstream-Status: Pending - While compiling gcc-crosssdk-initial-x86_64 on some host, there is occasionally failure that test the existance of default.h doesn't work, the reason is tm_include_list='** defaults.h' rather than tm_include_list='** ./defaults.h' So we add the test condition for this situation. + +Upstream-Status: Inappropriate [embedded specific] + +Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Hongxu Jia <hongxu.jia@windriver.com> --- gcc/Makefile.in | 2 +- @@ -26,10 +26,10 @@ Signed-off-by: Hongxu Jia <hongxu.jia@windriver.com> 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/gcc/Makefile.in b/gcc/Makefile.in -index 31ff95500c9..a8277254696 100644 +index 775aaa1b3c4..04f28984b34 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in -@@ -553,7 +553,7 @@ TARGET_SYSTEM_ROOT = @TARGET_SYSTEM_ROOT@ +@@ -561,7 +561,7 @@ TARGET_SYSTEM_ROOT = @TARGET_SYSTEM_ROOT@ TARGET_SYSTEM_ROOT_DEFINE = @TARGET_SYSTEM_ROOT_DEFINE@ xmake_file=@xmake_file@ @@ -39,10 +39,10 @@ index 31ff95500c9..a8277254696 100644 TM_MULTILIB_CONFIG=@TM_MULTILIB_CONFIG@ TM_MULTILIB_EXCEPTIONS_CONFIG=@TM_MULTILIB_EXCEPTIONS_CONFIG@ diff --git a/gcc/configure b/gcc/configure -index dc2d59701ad..3fc0e2f5813 100755 +index 3508be7b439..cf773a8b854 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -13381,8 +13381,8 @@ for f in $tm_file; do +@@ -13507,8 +13507,8 @@ for f in $tm_file; do tm_include_list="${tm_include_list} $f" ;; defaults.h ) @@ -54,10 +54,10 @@ index dc2d59701ad..3fc0e2f5813 100755 * ) tm_file_list="${tm_file_list} \$(srcdir)/config/$f" diff --git a/gcc/configure.ac b/gcc/configure.ac -index 36ce78924de..46de496b256 100644 +index 6cd01a8966b..22591478b72 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -2332,8 +2332,8 @@ for f in $tm_file; do +@@ -2357,8 +2357,8 @@ for f in $tm_file; do tm_include_list="${tm_include_list} $f" ;; defaults.h ) @@ -69,7 +69,7 @@ index 36ce78924de..46de496b256 100644 * ) tm_file_list="${tm_file_list} \$(srcdir)/config/$f" diff --git a/gcc/mkconfig.sh b/gcc/mkconfig.sh -index 91cc43f69ff..8de33713cd8 100644 +index 054ede89647..3b2c2b9df37 100644 --- a/gcc/mkconfig.sh +++ b/gcc/mkconfig.sh @@ -77,7 +77,7 @@ if [ -n "$HEADERS" ]; then diff --git a/meta/recipes-devtools/gcc/gcc/0006-cpp-honor-sysroot.patch b/meta/recipes-devtools/gcc/gcc/0006-cpp-honor-sysroot.patch index b08aecc736..704c44cb72 100644 --- a/meta/recipes-devtools/gcc/gcc/0006-cpp-honor-sysroot.patch +++ b/meta/recipes-devtools/gcc/gcc/0006-cpp-honor-sysroot.patch @@ -1,4 +1,4 @@ -From abc3b82ab24169277f2090e9df1ceac3573142be Mon Sep 17 00:00:00 2001 +From f0b4d02a3a3dca1d67fd7add15ed63c2cd572bb9 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:22:00 +0400 Subject: [PATCH] cpp: honor sysroot. @@ -17,16 +17,16 @@ The fix below adds %I to the cpp-output spec macro so the default substitutions RP 2012/04/13 -Signed-off-by: Khem Raj <raj.khem@gmail.com> +Upstream-Status: Inappropriate [embedded specific] -Upstream-Status: Pending +Signed-off-by: Khem Raj <raj.khem@gmail.com> --- gcc/cp/lang-specs.h | 2 +- gcc/gcc.cc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/cp/lang-specs.h b/gcc/cp/lang-specs.h -index f35c9fab76b..19ddc98ce7f 100644 +index c591d155cc1..61927869fe1 100644 --- a/gcc/cp/lang-specs.h +++ b/gcc/cp/lang-specs.h @@ -116,7 +116,7 @@ along with GCC; see the file COPYING3. If not see @@ -39,11 +39,11 @@ index f35c9fab76b..19ddc98ce7f 100644 " %{fmodule-only:%{!S:-o %g.s%V}}" " %{!fmodule-only:%{!fmodule-header*:%(invoke_as)}}}" diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index ce161d3c853..aa4cf92fb78 100644 +index 5feae021545..8af0c814c33 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1476,7 +1476,7 @@ static const struct compiler default_compilers[] = - %W{o*:--output-pch=%*}}%V}}}}}}}", 0, 0, 0}, +@@ -1468,7 +1468,7 @@ static const struct compiler default_compilers[] = + %W{o*:--output-pch %*}}%V}}}}}}}", 0, 0, 0}, {".i", "@cpp-output", 0, 0, 0}, {"@cpp-output", - "%{!M:%{!MM:%{!E:cc1 -fpreprocessed %i %(cc1_options) %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0}, diff --git a/meta/recipes-devtools/gcc/gcc/0007-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch b/meta/recipes-devtools/gcc/gcc/0007-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch index b59eed57e9..079142c540 100644 --- a/meta/recipes-devtools/gcc/gcc/0007-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch +++ b/meta/recipes-devtools/gcc/gcc/0007-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch @@ -1,4 +1,4 @@ -From 4de00af67b57b5440bdf61ab364ad959ad0aeee7 Mon Sep 17 00:00:00 2001 +From aacfd6e14dd583b1fdc65691def61c5e1bc89708 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:24:50 +0400 Subject: [PATCH] Define GLIBC_DYNAMIC_LINKER and UCLIBC_DYNAMIC_LINKER @@ -12,8 +12,6 @@ SH, sparc, alpha for possible future support (if any) Removes the do_headerfix task in metadata -Signed-off-by: Khem Raj <raj.khem@gmail.com> - Upstream-Status: Inappropriate [OE configuration] Signed-off-by: Khem Raj <raj.khem@gmail.com> --- @@ -38,7 +36,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 18 files changed, 53 insertions(+), 58 deletions(-) diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h -index 5e4553d79f5..877e8841eb2 100644 +index 4277f03da2a..e4c92c03291 100644 --- a/gcc/config/aarch64/aarch64-linux.h +++ b/gcc/config/aarch64/aarch64-linux.h @@ -21,10 +21,10 @@ @@ -55,7 +53,7 @@ index 5e4553d79f5..877e8841eb2 100644 #undef ASAN_CC1_SPEC #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}" diff --git a/gcc/config/alpha/linux-elf.h b/gcc/config/alpha/linux-elf.h -index 17f16a55910..0a7be38fa63 100644 +index 03f783f2ad1..4fa02668aa7 100644 --- a/gcc/config/alpha/linux-elf.h +++ b/gcc/config/alpha/linux-elf.h @@ -23,8 +23,8 @@ along with GCC; see the file COPYING3. If not see @@ -70,10 +68,10 @@ index 17f16a55910..0a7be38fa63 100644 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}" #elif DEFAULT_LIBC == LIBC_GLIBC diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h -index 50cc0bc6d08..17c18b27145 100644 +index a119875599d..dce7f59eeea 100644 --- a/gcc/config/arm/linux-eabi.h +++ b/gcc/config/arm/linux-eabi.h -@@ -65,8 +65,8 @@ +@@ -62,8 +62,8 @@ GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI. */ #undef GLIBC_DYNAMIC_LINKER @@ -84,7 +82,7 @@ index 50cc0bc6d08..17c18b27145 100644 #define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT #define GLIBC_DYNAMIC_LINKER \ -@@ -89,7 +89,7 @@ +@@ -86,7 +86,7 @@ #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}" #endif #define MUSL_DYNAMIC_LINKER \ @@ -94,7 +92,7 @@ index 50cc0bc6d08..17c18b27145 100644 /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to use the GNU/Linux version, not the generic BPABI version. */ diff --git a/gcc/config/arm/linux-elf.h b/gcc/config/arm/linux-elf.h -index df3da67c4f0..37456e9d5a4 100644 +index 7b7b7cbbe14..98ef2267117 100644 --- a/gcc/config/arm/linux-elf.h +++ b/gcc/config/arm/linux-elf.h @@ -60,7 +60,7 @@ @@ -107,7 +105,7 @@ index df3da67c4f0..37456e9d5a4 100644 #define LINUX_TARGET_LINK_SPEC "%{h*} \ %{static:-Bstatic} \ diff --git a/gcc/config/i386/linux.h b/gcc/config/i386/linux.h -index 5d99ee56d5b..a76022c9ccc 100644 +index bbb7cc7115e..7d9272040ee 100644 --- a/gcc/config/i386/linux.h +++ b/gcc/config/i386/linux.h @@ -20,7 +20,7 @@ along with GCC; see the file COPYING3. If not see @@ -121,7 +119,7 @@ index 5d99ee56d5b..a76022c9ccc 100644 -#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-i386.so.1" +#define MUSL_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-musl-i386.so.1" diff --git a/gcc/config/i386/linux64.h b/gcc/config/i386/linux64.h -index 8681e36f10d..ddce49b6b60 100644 +index 2bd9f48e271..dbbe7ca5440 100644 --- a/gcc/config/i386/linux64.h +++ b/gcc/config/i386/linux64.h @@ -27,13 +27,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see @@ -145,10 +143,10 @@ index 8681e36f10d..ddce49b6b60 100644 -#define MUSL_DYNAMIC_LINKERX32 "/lib/ld-musl-x32.so.1" +#define MUSL_DYNAMIC_LINKERX32 SYSTEMLIBS_DIR "ld-musl-x32.so.1" diff --git a/gcc/config/linux.h b/gcc/config/linux.h -index 74f70793d90..4ce173384ef 100644 +index e3aca79cccc..6491c6b84f5 100644 --- a/gcc/config/linux.h +++ b/gcc/config/linux.h -@@ -99,10 +99,10 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +@@ -86,10 +86,10 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see GLIBC_DYNAMIC_LINKER must be defined for each target using them, or GLIBC_DYNAMIC_LINKER32 and GLIBC_DYNAMIC_LINKER64 for targets supporting both 32-bit and 64-bit compilation. */ @@ -164,7 +162,7 @@ index 74f70793d90..4ce173384ef 100644 #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker" #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64" diff --git a/gcc/config/loongarch/gnu-user.h b/gcc/config/loongarch/gnu-user.h -index 664dc9206ad..082bd7cfc6f 100644 +index aecaa02a199..62f88f7f9a2 100644 --- a/gcc/config/loongarch/gnu-user.h +++ b/gcc/config/loongarch/gnu-user.h @@ -31,11 +31,11 @@ along with GCC; see the file COPYING3. If not see @@ -182,7 +180,7 @@ index 664dc9206ad..082bd7cfc6f 100644 #undef GNU_USER_TARGET_LINK_SPEC #define GNU_USER_TARGET_LINK_SPEC \ diff --git a/gcc/config/microblaze/linux.h b/gcc/config/microblaze/linux.h -index 5b1a365eda4..2e63df1ae9c 100644 +index e2e2c421c52..6f26480e3b5 100644 --- a/gcc/config/microblaze/linux.h +++ b/gcc/config/microblaze/linux.h @@ -28,7 +28,7 @@ @@ -204,7 +202,7 @@ index 5b1a365eda4..2e63df1ae9c 100644 #undef SUBTARGET_EXTRA_SPECS #define SUBTARGET_EXTRA_SPECS \ diff --git a/gcc/config/mips/linux.h b/gcc/config/mips/linux.h -index 230b7789bb8..d96d134bfcf 100644 +index 5add34ea134..34692b433b8 100644 --- a/gcc/config/mips/linux.h +++ b/gcc/config/mips/linux.h @@ -22,29 +22,29 @@ along with GCC; see the file COPYING3. If not see @@ -247,22 +245,24 @@ index 230b7789bb8..d96d134bfcf 100644 #define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32" #define GNU_USER_DYNAMIC_LINKERN32 \ diff --git a/gcc/config/nios2/linux.h b/gcc/config/nios2/linux.h -index f5dd813acad..7a13e1c9799 100644 +index 2ce097ebbce..1d45d7b4962 100644 --- a/gcc/config/nios2/linux.h +++ b/gcc/config/nios2/linux.h -@@ -29,8 +29,8 @@ +@@ -29,10 +29,10 @@ #undef CPP_SPEC #define CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}" -#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-nios2.so.1" --#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-nios2.so.1" +#define GLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-linux-nios2.so.1" + + #undef MUSL_DYNAMIC_LINKER +-#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-nios2.so.1" +#define MUSL_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-musl-nios2.so.1" #undef LINK_SPEC #define LINK_SPEC LINK_SPEC_ENDIAN \ diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h -index 38803723ba9..d5ef8a96a19 100644 +index 3e625e0f867..dc3afc97e27 100644 --- a/gcc/config/riscv/linux.h +++ b/gcc/config/riscv/linux.h @@ -22,7 +22,7 @@ along with GCC; see the file COPYING3. If not see @@ -281,10 +281,10 @@ index 38803723ba9..d5ef8a96a19 100644 -#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-riscv" XLEN_SPEC MUSL_ABI_SUFFIX ".so.1" +#define MUSL_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-musl-riscv" XLEN_SPEC MUSL_ABI_SUFFIX ".so.1" - /* Because RISC-V only has word-sized atomics, it requries libatomic where - others do not. So link libatomic by default, as needed. */ + #define ICACHE_FLUSH_FUNC "__riscv_flush_icache" + diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h -index b2a7afabc73..364c1a5b155 100644 +index 9e457033d11..2ddab7c99c1 100644 --- a/gcc/config/rs6000/linux64.h +++ b/gcc/config/rs6000/linux64.h @@ -339,24 +339,19 @@ extern int dot_symbols; @@ -318,10 +318,10 @@ index b2a7afabc73..364c1a5b155 100644 #undef DEFAULT_ASM_ENDIAN #if (TARGET_DEFAULT & MASK_LITTLE_ENDIAN) diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h -index 7e2519de5d4..a73954d9de5 100644 +index ae932fc22f0..26db003cb3a 100644 --- a/gcc/config/rs6000/sysv4.h +++ b/gcc/config/rs6000/sysv4.h -@@ -779,10 +779,10 @@ GNU_USER_TARGET_CC1_SPEC +@@ -771,10 +771,10 @@ GNU_USER_TARGET_CC1_SPEC #define MUSL_DYNAMIC_LINKER_E ENDIAN_SELECT("","le","") @@ -335,7 +335,7 @@ index 7e2519de5d4..a73954d9de5 100644 #ifndef GNU_USER_DYNAMIC_LINKER #define GNU_USER_DYNAMIC_LINKER GLIBC_DYNAMIC_LINKER diff --git a/gcc/config/s390/linux.h b/gcc/config/s390/linux.h -index d7b7e7a7b02..0139b4d06ca 100644 +index 02aa1edaff8..fab268d61f4 100644 --- a/gcc/config/s390/linux.h +++ b/gcc/config/s390/linux.h @@ -72,13 +72,13 @@ along with GCC; see the file COPYING3. If not see @@ -357,7 +357,7 @@ index d7b7e7a7b02..0139b4d06ca 100644 #undef LINK_SPEC #define LINK_SPEC \ diff --git a/gcc/config/sh/linux.h b/gcc/config/sh/linux.h -index d96d077c99e..7d27f9893ee 100644 +index 29f5902b98b..83d1e53e6e2 100644 --- a/gcc/config/sh/linux.h +++ b/gcc/config/sh/linux.h @@ -61,10 +61,10 @@ along with GCC; see the file COPYING3. If not see @@ -374,7 +374,7 @@ index d96d077c99e..7d27f9893ee 100644 #undef SUBTARGET_LINK_EMUL_SUFFIX #define SUBTARGET_LINK_EMUL_SUFFIX "%{mfdpic:_fd;:_linux}" diff --git a/gcc/config/sparc/linux.h b/gcc/config/sparc/linux.h -index 6a809e9092d..60603765ad6 100644 +index 0e33b3cac2c..84f29adbb35 100644 --- a/gcc/config/sparc/linux.h +++ b/gcc/config/sparc/linux.h @@ -78,7 +78,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); @@ -387,7 +387,7 @@ index 6a809e9092d..60603765ad6 100644 #undef LINK_SPEC #define LINK_SPEC "-m elf32_sparc %{shared:-shared} \ diff --git a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h -index d08a2ef96fe..e6955da0a5b 100644 +index f1cc0a19e49..94bc2032803 100644 --- a/gcc/config/sparc/linux64.h +++ b/gcc/config/sparc/linux64.h @@ -78,8 +78,8 @@ along with GCC; see the file COPYING3. If not see diff --git a/meta/recipes-devtools/gcc/gcc/0008-libtool.patch b/meta/recipes-devtools/gcc/gcc/0008-libtool.patch index c9bc38ccf0..5b44dc809e 100644 --- a/meta/recipes-devtools/gcc/gcc/0008-libtool.patch +++ b/meta/recipes-devtools/gcc/gcc/0008-libtool.patch @@ -1,4 +1,4 @@ -From 5117519c1897a49b09fe7fff213b9c2ea15d37f5 Mon Sep 17 00:00:00 2001 +From 7608e93ab97e8c33e3b14323d0cabc651926e403 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:29:11 +0400 Subject: [PATCH] libtool @@ -15,9 +15,8 @@ to filter the zero case. RP 2012/8/24 +Upstream-Status: Submitted [https://lists.gnu.org/archive/html/libtool-patches/2023-04/msg00000.html] Signed-off-by: Khem Raj <raj.khem@gmail.com> - -Upstream-Status: Pending --- ltmain.sh | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/meta/recipes-devtools/gcc/gcc/0009-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch b/meta/recipes-devtools/gcc/gcc/0009-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch index dd67b115f0..86542bd146 100644 --- a/meta/recipes-devtools/gcc/gcc/0009-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch +++ b/meta/recipes-devtools/gcc/gcc/0009-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch @@ -1,4 +1,4 @@ -From 32129f9682d0d27fc67af10f077ad2768935cbe6 Mon Sep 17 00:00:00 2001 +From 4b0efc18e0d91967a3db11d9ef0595a5a76ad67a Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:30:32 +0400 Subject: [PATCH] gcc: armv4: pass fix-v4bx to linker to support EABI. @@ -11,18 +11,17 @@ for eabi defaulting toolchains. We might want to send it upstream. +Upstream-Status: Submitted [https://gcc.gnu.org/pipermail/gcc-patches/2023-April/615319.html] Signed-off-by: Khem Raj <raj.khem@gmail.com> - -Upstream-Status: Pending --- gcc/config/arm/linux-eabi.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h -index 17c18b27145..8eacb099317 100644 +index dce7f59eeea..27402c629c6 100644 --- a/gcc/config/arm/linux-eabi.h +++ b/gcc/config/arm/linux-eabi.h -@@ -91,10 +91,14 @@ +@@ -88,10 +88,14 @@ #define MUSL_DYNAMIC_LINKER \ SYSTEMLIBS_DIR "ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1" diff --git a/meta/recipes-devtools/gcc/gcc/0010-Use-the-multilib-config-files-from-B-instead-of-usin.patch b/meta/recipes-devtools/gcc/gcc/0010-Use-the-multilib-config-files-from-B-instead-of-usin.patch index 45edc62eb5..bc3943087c 100644 --- a/meta/recipes-devtools/gcc/gcc/0010-Use-the-multilib-config-files-from-B-instead-of-usin.patch +++ b/meta/recipes-devtools/gcc/gcc/0010-Use-the-multilib-config-files-from-B-instead-of-usin.patch @@ -1,4 +1,4 @@ -From bf85b8bbcb4b77725d4c22c1bb25a29f6ff21038 Mon Sep 17 00:00:00 2001 +From b015460586e2ea8a35a11d1a607728707bdf6509 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:33:04 +0400 Subject: [PATCH] Use the multilib config files from ${B} instead of using the @@ -18,10 +18,10 @@ Upstream-Status: Inappropriate [configuration] 2 files changed, 36 insertions(+), 8 deletions(-) diff --git a/gcc/configure b/gcc/configure -index 3fc0e2f5813..2f0f0e057a9 100755 +index cf773a8b854..448a1ec093e 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -13361,10 +13361,20 @@ done +@@ -13487,10 +13487,20 @@ done tmake_file_= for f in ${tmake_file} do @@ -46,7 +46,7 @@ index 3fc0e2f5813..2f0f0e057a9 100755 done tmake_file="${tmake_file_}${omp_device_property_tmake_file}" -@@ -13375,6 +13385,10 @@ tm_file_list="options.h" +@@ -13501,6 +13511,10 @@ tm_file_list="options.h" tm_include_list="options.h insn-constants.h" for f in $tm_file; do case $f in @@ -58,10 +58,10 @@ index 3fc0e2f5813..2f0f0e057a9 100755 f=`echo $f | sed 's/^..//'` tm_file_list="${tm_file_list} $f" diff --git a/gcc/configure.ac b/gcc/configure.ac -index 46de496b256..6155b83a732 100644 +index 22591478b72..b6e7f5149a7 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -2312,10 +2312,20 @@ done +@@ -2337,10 +2337,20 @@ done tmake_file_= for f in ${tmake_file} do @@ -86,7 +86,7 @@ index 46de496b256..6155b83a732 100644 done tmake_file="${tmake_file_}${omp_device_property_tmake_file}" -@@ -2326,6 +2336,10 @@ tm_file_list="options.h" +@@ -2351,6 +2361,10 @@ tm_file_list="options.h" tm_include_list="options.h insn-constants.h" for f in $tm_file; do case $f in diff --git a/meta/recipes-devtools/gcc/gcc/0011-aarch64-Fix-include-paths-when-S-B.patch b/meta/recipes-devtools/gcc/gcc/0011-aarch64-Fix-include-paths-when-S-B.patch new file mode 100644 index 0000000000..974aca5ee4 --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0011-aarch64-Fix-include-paths-when-S-B.patch @@ -0,0 +1,55 @@ +From b7ce05b2d969b311c6061bda32c3117c76bf7e0c Mon Sep 17 00:00:00 2001 +From: Khem Raj <raj.khem@gmail.com> +Date: Tue, 31 Jan 2023 22:03:38 -0800 +Subject: [PATCH] aarch64: Fix include paths when S != B + +aarch64.h gets copied into build directory when built out of tree, in +this case build uses this file but does not find the includes inside it +since they are not found in any of include paths specified in compiler +cmdline. + +Fixes build errors like + +% g++ -c -isystem/mnt/b/yoe/master/build/tmp/work/x86_64-linux/gcc-cross-aarch64/13.0.1-r0/recipe-sysroot-native/usr/include -O2 -pipe -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute -Wconditionally-supported -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings -DHAVE_CONFIG_H -DGENERATOR_FILE -I. -Ibuild -I../../../../../../../work-shared/gcc-13.0.1-r0/gcc-b2ec2504af77b35e748067eeb846821d12a6b6b4/gcc -I../../../../../../../work-shared/gcc-13.0.1-r0/gcc-b2ec2504af77b35e748067eeb846821d12a6b6b4/gcc/build -I../../../../../../../work-shared/gcc-13.0.1-r0/gcc-b2ec2504af77b35e748067eeb846821d12a6b6b4/gcc/../include -I../../../../../../../work-shared/gcc-13.0.1-r0/gcc-b2ec2504af77b35e748067eeb846821d12a6b6b4/gcc/../libcpp/include -o build/gencheck.o ../../../../../../../work-shared/gcc-13.0.1-r0/gcc-b2ec2504af77b35e748067eeb846821d12a6b6b4/gcc/gencheck.cc +In file included from ./tm.h:34, + from ../../../../../../../work-shared/gcc-13.0.1-r0/gcc-b2ec2504af77b35e748067eeb846821d12a6b6b4/gcc/gencheck.cc:23: +./config/aarch64/aarch64.h:164:10: fatal error: aarch64-option-extensions.def: No such file or directory + 164 | #include "aarch64-option-extensions.def" + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +compilation terminated. + +See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105144 + +Upstream-Status: Pending + +Signed-off-by: Khem Raj <raj.khem@gmail.com> +--- + gcc/config/aarch64/aarch64.h | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index 73b09e20508..10ea3672f20 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -161,8 +161,8 @@ + enum class aarch64_feature : unsigned char { + #define AARCH64_OPT_EXTENSION(A, IDENT, C, D, E, F) IDENT, + #define AARCH64_ARCH(A, B, IDENT, D, E) IDENT, +-#include "aarch64-option-extensions.def" +-#include "aarch64-arches.def" ++#include "config/aarch64/aarch64-option-extensions.def" ++#include "config/aarch64/aarch64-arches.def" + }; + + /* Define unique flags for each of the above. */ +@@ -171,8 +171,8 @@ enum class aarch64_feature : unsigned char { + = aarch64_feature_flags (1) << int (aarch64_feature::IDENT); + #define AARCH64_OPT_EXTENSION(A, IDENT, C, D, E, F) HANDLE (IDENT) + #define AARCH64_ARCH(A, B, IDENT, D, E) HANDLE (IDENT) +-#include "aarch64-option-extensions.def" +-#include "aarch64-arches.def" ++#include "config/aarch64/aarch64-option-extensions.def" ++#include "config/aarch64/aarch64-arches.def" + #undef HANDLE + + #endif diff --git a/meta/recipes-devtools/gcc/gcc/0011-Avoid-using-libdir-from-.la-which-usually-points-to-.patch b/meta/recipes-devtools/gcc/gcc/0012-Avoid-using-libdir-from-.la-which-usually-points-to-.patch index 352c6eec29..cf5efcd32d 100644 --- a/meta/recipes-devtools/gcc/gcc/0011-Avoid-using-libdir-from-.la-which-usually-points-to-.patch +++ b/meta/recipes-devtools/gcc/gcc/0012-Avoid-using-libdir-from-.la-which-usually-points-to-.patch @@ -1,4 +1,4 @@ -From e5463727ff028cee5e452da38f5b4c44d52e412e Mon Sep 17 00:00:00 2001 +From 39ab6fe76f2788b2c989d29c9016f1fe53cb736e Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 20 Feb 2015 09:39:38 +0000 Subject: [PATCH] Avoid using libdir from .la which usually points to a host diff --git a/meta/recipes-devtools/gcc/gcc/0012-export-CPP.patch b/meta/recipes-devtools/gcc/gcc/0012-export-CPP.patch deleted file mode 100644 index 7e1ebef463..0000000000 --- a/meta/recipes-devtools/gcc/gcc/0012-export-CPP.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 20afebc61199cd74481b0b831c1b56465cd37fa0 Mon Sep 17 00:00:00 2001 -From: Khem Raj <raj.khem@gmail.com> -Date: Fri, 20 Feb 2015 09:40:59 +0000 -Subject: [PATCH] export CPP - -The OE environment sets and exports CPP as being the target gcc. When -building gcc-cross-canadian for a mingw targetted sdk, the following can be found -in build.x86_64-pokysdk-mingw32.i586-poky-linux/build-x86_64-linux/libiberty/config.log: - -configure:3641: checking for _FILE_OFFSET_BITS value needed for large files -configure:3666: gcc -c -isystem/media/build1/poky/build/tmp/sysroots/x86_64-linux/usr/include -O2 -pipe conftest.c >&5 -configure:3666: $? = 0 -configure:3698: result: no -configure:3786: checking how to run the C preprocessor -configure:3856: result: x86_64-pokysdk-mingw32-gcc -E --sysroot=/media/build1/poky/build/tmp/sysroots/x86_64-nativesdk-mingw32-pokysdk-mingw32 -configure:3876: x86_64-pokysdk-mingw32-gcc -E --sysroot=/media/build1/poky/build/tmp/sysroots/x86_64-nativesdk-mingw32-pokysdk-mingw32 conftest.c -configure:3876: $? = 0 - -Note this is a *build* target (in build-x86_64-linux) so it should be -using the host "gcc", not x86_64-pokysdk-mingw32-gcc. Since the mingw32 -headers are very different, using the wrong cpp is a real problem. It is leaking -into configure through the CPP variable. Ultimately this leads to build -failures related to not being able to include a process.h file for pem-unix.c. - -The fix is to ensure we export a sane CPP value into the build -environment when using build targets. We could define a CPP_FOR_BUILD value which may be -the version which needs to be upstreamed but for now, this fix is good enough to -avoid the problem. - -RP 22/08/2013 - -Upstream-Status: Pending - -Signed-off-by: Khem Raj <raj.khem@gmail.com> ---- - Makefile.in | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/Makefile.in b/Makefile.in -index 1d9c83cc566..11819667751 100644 ---- a/Makefile.in -+++ b/Makefile.in -@@ -152,6 +152,7 @@ BUILD_EXPORTS = \ - AR="$(AR_FOR_BUILD)"; export AR; \ - AS="$(AS_FOR_BUILD)"; export AS; \ - CC="$(CC_FOR_BUILD)"; export CC; \ -+ CPP="$(CC_FOR_BUILD) -E"; export CPP; \ - CFLAGS="$(CFLAGS_FOR_BUILD)"; export CFLAGS; \ - CONFIG_SHELL="$(SHELL)"; export CONFIG_SHELL; \ - CPP="$(CPP_FOR_BUILD)"; export CPP; \ diff --git a/meta/recipes-devtools/gcc/gcc/0013-Ensure-target-gcc-headers-can-be-included.patch b/meta/recipes-devtools/gcc/gcc/0013-Ensure-target-gcc-headers-can-be-included.patch index 61e61ecc6e..e2343a3c17 100644 --- a/meta/recipes-devtools/gcc/gcc/0013-Ensure-target-gcc-headers-can-be-included.patch +++ b/meta/recipes-devtools/gcc/gcc/0013-Ensure-target-gcc-headers-can-be-included.patch @@ -1,4 +1,4 @@ -From 612801d426e75ff997cfabda380dbe52c2cbc532 Mon Sep 17 00:00:00 2001 +From 531b9df680c4380797e8e7705a8e7f8ed17ebe68 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 20 Feb 2015 10:25:11 +0000 Subject: [PATCH] Ensure target gcc headers can be included @@ -13,7 +13,7 @@ command line in order to resolve this. Extend target gcc headers search to musl too -Upstream-Status: Pending +Upstream-Status: Inappropriate [embedded specific] Signed-off-by: Paul Eggleton <paul.eggleton@linux.intel.com> Signed-off-by: Khem Raj <raj.khem@gmail.com> @@ -25,10 +25,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 4 files changed, 22 insertions(+) diff --git a/gcc/Makefile.in b/gcc/Makefile.in -index a8277254696..07fa63b6640 100644 +index 04f28984b34..8ef996c0f4d 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in -@@ -632,6 +632,7 @@ libexecdir = @libexecdir@ +@@ -640,6 +640,7 @@ libexecdir = @libexecdir@ # Directory in which the compiler finds libraries etc. libsubdir = $(libdir)/gcc/$(real_target_noncanonical)/$(version)$(accel_dir_suffix) @@ -36,7 +36,7 @@ index a8277254696..07fa63b6640 100644 # Directory in which the compiler finds executables libexecsubdir = $(libexecdir)/gcc/$(real_target_noncanonical)/$(version)$(accel_dir_suffix) # Directory in which all plugin resources are installed -@@ -3024,6 +3025,7 @@ CFLAGS-intl.o += -DLOCALEDIR=\"$(localedir)\" +@@ -3059,6 +3060,7 @@ CFLAGS-intl.o += -DLOCALEDIR=\"$(localedir)\" PREPROCESSOR_DEFINES = \ -DGCC_INCLUDE_DIR=\"$(libsubdir)/include\" \ @@ -45,10 +45,10 @@ index a8277254696..07fa63b6640 100644 -DGPLUSPLUS_INCLUDE_DIR=\"$(gcc_gxx_include_dir)\" \ -DGPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT=$(gcc_gxx_include_dir_add_sysroot) \ diff --git a/gcc/config/linux.h b/gcc/config/linux.h -index 4ce173384ef..8a3cd4f2d34 100644 +index 6491c6b84f5..57496ff1f2f 100644 --- a/gcc/config/linux.h +++ b/gcc/config/linux.h -@@ -170,6 +170,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +@@ -157,6 +157,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define INCLUDE_DEFAULTS_MUSL_TOOL #endif @@ -62,7 +62,7 @@ index 4ce173384ef..8a3cd4f2d34 100644 #ifdef NATIVE_SYSTEM_HEADER_DIR #define INCLUDE_DEFAULTS_MUSL_NATIVE \ { NATIVE_SYSTEM_HEADER_DIR, 0, 0, 0, 1, 2 }, \ -@@ -196,6 +203,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +@@ -183,6 +190,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see INCLUDE_DEFAULTS_MUSL_PREFIX \ INCLUDE_DEFAULTS_MUSL_CROSS \ INCLUDE_DEFAULTS_MUSL_TOOL \ @@ -71,10 +71,10 @@ index 4ce173384ef..8a3cd4f2d34 100644 { GCC_INCLUDE_DIR, "GCC", 0, 1, 0, 0 }, \ { 0, 0, 0, 0, 0, 0 } \ diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h -index a73954d9de5..e5dd6538358 100644 +index 26db003cb3a..3a443abcf6b 100644 --- a/gcc/config/rs6000/sysv4.h +++ b/gcc/config/rs6000/sysv4.h -@@ -994,6 +994,13 @@ ncrtn.o%s" +@@ -986,6 +986,13 @@ ncrtn.o%s" #define INCLUDE_DEFAULTS_MUSL_TOOL #endif @@ -88,7 +88,7 @@ index a73954d9de5..e5dd6538358 100644 #ifdef NATIVE_SYSTEM_HEADER_DIR #define INCLUDE_DEFAULTS_MUSL_NATIVE \ { NATIVE_SYSTEM_HEADER_DIR, 0, 0, 0, 1, 2 }, \ -@@ -1020,6 +1027,7 @@ ncrtn.o%s" +@@ -1012,6 +1019,7 @@ ncrtn.o%s" INCLUDE_DEFAULTS_MUSL_PREFIX \ INCLUDE_DEFAULTS_MUSL_CROSS \ INCLUDE_DEFAULTS_MUSL_TOOL \ @@ -97,7 +97,7 @@ index a73954d9de5..e5dd6538358 100644 { GCC_INCLUDE_DIR, "GCC", 0, 1, 0, 0 }, \ { 0, 0, 0, 0, 0, 0 } \ diff --git a/gcc/cppdefault.cc b/gcc/cppdefault.cc -index 7888300f277..52cf14e92f8 100644 +index 141bb4d25f6..734590a7059 100644 --- a/gcc/cppdefault.cc +++ b/gcc/cppdefault.cc @@ -64,6 +64,10 @@ const struct default_include cpp_include_defaults[] diff --git a/meta/recipes-devtools/gcc/gcc/0014-Don-t-search-host-directory-during-relink-if-inst_pr.patch b/meta/recipes-devtools/gcc/gcc/0014-Don-t-search-host-directory-during-relink-if-inst_pr.patch index 94308b2aca..30224d7485 100644 --- a/meta/recipes-devtools/gcc/gcc/0014-Don-t-search-host-directory-during-relink-if-inst_pr.patch +++ b/meta/recipes-devtools/gcc/gcc/0014-Don-t-search-host-directory-during-relink-if-inst_pr.patch @@ -1,4 +1,4 @@ -From 9ae49e7b88c208ab79ec9c2fc4a2fa8a3f1e85bb Mon Sep 17 00:00:00 2001 +From 793201cebfeb129f6f263e64310b30a0ffa48895 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Tue, 3 Mar 2015 08:21:19 +0000 Subject: [PATCH] Don't search host directory during "relink" if $inst_prefix diff --git a/meta/recipes-devtools/gcc/gcc/0015-libcc1-fix-libcc1-s-install-path-and-rpath.patch b/meta/recipes-devtools/gcc/gcc/0015-libcc1-fix-libcc1-s-install-path-and-rpath.patch index ce9635ce4d..33c601ac97 100644 --- a/meta/recipes-devtools/gcc/gcc/0015-libcc1-fix-libcc1-s-install-path-and-rpath.patch +++ b/meta/recipes-devtools/gcc/gcc/0015-libcc1-fix-libcc1-s-install-path-and-rpath.patch @@ -1,4 +1,4 @@ -From bf918db7117f41d3c04162095641165ca241707d Mon Sep 17 00:00:00 2001 +From 5de63874335c1c673dd132f6aca00dc13f1eac51 Mon Sep 17 00:00:00 2001 From: Robert Yang <liezhi.yang@windriver.com> Date: Sun, 5 Jul 2015 20:25:18 -0700 Subject: [PATCH] libcc1: fix libcc1's install path and rpath @@ -20,7 +20,7 @@ Signed-off-by: Robert Yang <liezhi.yang@windriver.com> 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/libcc1/Makefile.am b/libcc1/Makefile.am -index 6e3a34ff7e2..3f3f6391aba 100644 +index 921a33fe236..938e6f964cd 100644 --- a/libcc1/Makefile.am +++ b/libcc1/Makefile.am @@ -40,8 +40,8 @@ libiberty = $(if $(wildcard $(libiberty_noasan)),$(Wc)$(libiberty_noasan), \ diff --git a/meta/recipes-devtools/gcc/gcc/0016-handle-sysroot-support-for-nativesdk-gcc.patch b/meta/recipes-devtools/gcc/gcc/0016-handle-sysroot-support-for-nativesdk-gcc.patch index 3b54719536..bdffcae7dc 100644 --- a/meta/recipes-devtools/gcc/gcc/0016-handle-sysroot-support-for-nativesdk-gcc.patch +++ b/meta/recipes-devtools/gcc/gcc/0016-handle-sysroot-support-for-nativesdk-gcc.patch @@ -1,4 +1,4 @@ -From 4fbbd40d7db89cdbeaf93df1e1da692b1f80a5bc Mon Sep 17 00:00:00 2001 +From bbc75b93bff66891fa7ffb3af5c6ad53df1fff68 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Mon, 7 Dec 2015 23:39:54 +0000 Subject: [PATCH] handle sysroot support for nativesdk-gcc @@ -38,15 +38,15 @@ Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org> gcc/c-family/c-opts.cc | 4 +-- gcc/config/linux.h | 24 +++++++-------- gcc/config/rs6000/sysv4.h | 24 +++++++-------- - gcc/cppdefault.cc | 63 ++++++++++++++++++++++++--------------- - gcc/cppdefault.h | 13 ++++---- - gcc/gcc.cc | 20 +++++++++---- + gcc/cppdefault.cc | 65 ++++++++++++++++++++++++--------------- + gcc/cppdefault.h | 13 +++----- + gcc/gcc.cc | 20 ++++++++---- gcc/incpath.cc | 12 ++++---- gcc/prefix.cc | 6 ++-- - 8 files changed, 94 insertions(+), 72 deletions(-) + 8 files changed, 95 insertions(+), 73 deletions(-) diff --git a/gcc/c-family/c-opts.cc b/gcc/c-family/c-opts.cc -index a341a061758..83b0bef4dbb 100644 +index c68a2a27469..77e9b5eceaa 100644 --- a/gcc/c-family/c-opts.cc +++ b/gcc/c-family/c-opts.cc @@ -1458,8 +1458,8 @@ add_prefixed_path (const char *suffix, incpath_kind chain) @@ -61,10 +61,10 @@ index a341a061758..83b0bef4dbb 100644 path = (char *) xmalloc (prefix_len + suffix_len + 1); memcpy (path, prefix, prefix_len); diff --git a/gcc/config/linux.h b/gcc/config/linux.h -index 8a3cd4f2d34..58143dff731 100644 +index 57496ff1f2f..c921cf6ef63 100644 --- a/gcc/config/linux.h +++ b/gcc/config/linux.h -@@ -134,53 +134,53 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +@@ -121,53 +121,53 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see * Unfortunately, this is mostly duplicated from cppdefault.cc */ #if DEFAULT_LIBC == LIBC_MUSL #define INCLUDE_DEFAULTS_MUSL_GPP \ @@ -129,7 +129,7 @@ index 8a3cd4f2d34..58143dff731 100644 #else #define INCLUDE_DEFAULTS_MUSL_NATIVE #endif -@@ -205,7 +205,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +@@ -192,7 +192,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see INCLUDE_DEFAULTS_MUSL_TOOL \ INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET \ INCLUDE_DEFAULTS_MUSL_NATIVE \ @@ -139,10 +139,10 @@ index 8a3cd4f2d34..58143dff731 100644 } #endif diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h -index e5dd6538358..b496849b792 100644 +index 3a443abcf6b..ef83a5a432e 100644 --- a/gcc/config/rs6000/sysv4.h +++ b/gcc/config/rs6000/sysv4.h -@@ -958,53 +958,53 @@ ncrtn.o%s" +@@ -950,53 +950,53 @@ ncrtn.o%s" /* Include order changes for musl, same as in generic linux.h. */ #if DEFAULT_LIBC == LIBC_MUSL #define INCLUDE_DEFAULTS_MUSL_GPP \ @@ -207,7 +207,7 @@ index e5dd6538358..b496849b792 100644 #else #define INCLUDE_DEFAULTS_MUSL_NATIVE #endif -@@ -1029,7 +1029,7 @@ ncrtn.o%s" +@@ -1021,7 +1021,7 @@ ncrtn.o%s" INCLUDE_DEFAULTS_MUSL_TOOL \ INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET \ INCLUDE_DEFAULTS_MUSL_NATIVE \ @@ -217,7 +217,7 @@ index e5dd6538358..b496849b792 100644 } #endif diff --git a/gcc/cppdefault.cc b/gcc/cppdefault.cc -index 52cf14e92f8..d8977afc05e 100644 +index 734590a7059..b4a8fc29e4a 100644 --- a/gcc/cppdefault.cc +++ b/gcc/cppdefault.cc @@ -35,6 +35,30 @@ @@ -272,7 +272,7 @@ index 52cf14e92f8..d8977afc05e 100644 GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 0 }, #endif #ifdef GPLUSPLUS_LIBCXX_INCLUDE_DIR -@@ -62,23 +86,23 @@ const struct default_include cpp_include_defaults[] +@@ -62,26 +86,26 @@ const struct default_include cpp_include_defaults[] #endif #ifdef GCC_INCLUDE_DIR /* This is the dir for gcc's private headers. */ @@ -297,12 +297,16 @@ index 52cf14e92f8..d8977afc05e 100644 #endif #ifdef FIXED_INCLUDE_DIR /* This is the dir for fixincludes. */ + #ifndef SYSROOT_HEADERS_SUFFIX_SPEC +- { FIXED_INCLUDE_DIR, "GCC", 0, 0, 0, 2 }, ++ { FIXED_INCLUDE_DIRVAR, "GCC", 0, 0, 0, 2 }, + #endif - { FIXED_INCLUDE_DIR, "GCC", 0, 0, 0, + { FIXED_INCLUDE_DIRVAR, "GCC", 0, 0, 0, /* A multilib suffix needs adding if different multilibs use different headers. */ #ifdef SYSROOT_HEADERS_SUFFIX_SPEC -@@ -90,33 +114,24 @@ const struct default_include cpp_include_defaults[] +@@ -93,33 +117,24 @@ const struct default_include cpp_include_defaults[] #endif #ifdef CROSS_INCLUDE_DIR /* One place the target system's headers might be. */ @@ -343,7 +347,7 @@ index 52cf14e92f8..d8977afc05e 100644 /* This value is set by cpp_relocated at runtime */ const char *gcc_exec_prefix; diff --git a/gcc/cppdefault.h b/gcc/cppdefault.h -index fb97c0b5814..6267150facc 100644 +index e26b424e99c..c9abb090dcd 100644 --- a/gcc/cppdefault.h +++ b/gcc/cppdefault.h @@ -33,7 +33,8 @@ @@ -378,10 +382,10 @@ index fb97c0b5814..6267150facc 100644 subdirectory of the actual installation. */ extern const char *gcc_exec_prefix; diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index aa4cf92fb78..5569a39a14a 100644 +index 8af0c814c33..605fe3b8c0d 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -252,6 +252,8 @@ FILE *report_times_to_file = NULL; +@@ -255,6 +255,8 @@ FILE *report_times_to_file = NULL; #endif static const char *target_system_root = DEFAULT_TARGET_SYSTEM_ROOT; @@ -390,7 +394,7 @@ index aa4cf92fb78..5569a39a14a 100644 /* Nonzero means pass the updated target_system_root to the compiler. */ static int target_system_root_changed; -@@ -575,6 +577,7 @@ or with constant text in a single argument. +@@ -578,6 +580,7 @@ or with constant text in a single argument. %G process LIBGCC_SPEC as a spec. %R Output the concatenation of target_system_root and target_sysroot_suffix. @@ -398,7 +402,7 @@ index aa4cf92fb78..5569a39a14a 100644 %S process STARTFILE_SPEC as a spec. A capital S is actually used here. %E process ENDFILE_SPEC as a spec. A capital E is actually used here. %C process CPP_SPEC as a spec. -@@ -1627,10 +1630,10 @@ static const char *gcc_libexec_prefix; +@@ -1619,10 +1622,10 @@ static const char *gcc_libexec_prefix; gcc_exec_prefix is set because, in that case, we know where the compiler has been installed, and use paths relative to that location instead. */ @@ -413,7 +417,7 @@ index aa4cf92fb78..5569a39a14a 100644 /* For native compilers, these are well-known paths containing components that may be provided by the system. For cross -@@ -1638,9 +1641,9 @@ static const char *const standard_startfile_prefix = STANDARD_STARTFILE_PREFIX; +@@ -1630,9 +1633,9 @@ static const char *const standard_startfile_prefix = STANDARD_STARTFILE_PREFIX; static const char *md_exec_prefix = MD_EXEC_PREFIX; static const char *md_startfile_prefix = MD_STARTFILE_PREFIX; static const char *md_startfile_prefix_1 = MD_STARTFILE_PREFIX_1; @@ -425,7 +429,7 @@ index aa4cf92fb78..5569a39a14a 100644 = STANDARD_STARTFILE_PREFIX_2; /* A relative path to be used in finding the location of tools -@@ -6676,6 +6679,11 @@ do_spec_1 (const char *spec, int inswitch, const char *soft_matched_part) +@@ -6652,6 +6655,11 @@ do_spec_1 (const char *spec, int inswitch, const char *soft_matched_part) } break; @@ -438,7 +442,7 @@ index aa4cf92fb78..5569a39a14a 100644 value = do_spec_1 (startfile_spec, 0, NULL); if (value != 0) diff --git a/gcc/incpath.cc b/gcc/incpath.cc -index c80f100f476..5ac03c08693 100644 +index 46c0d543205..d088dae7b04 100644 --- a/gcc/incpath.cc +++ b/gcc/incpath.cc @@ -135,7 +135,7 @@ add_standard_paths (const char *sysroot, const char *iprefix, @@ -485,10 +489,10 @@ index c80f100f476..5ac03c08693 100644 str = update_path (ostr, p->component); free (ostr); diff --git a/gcc/prefix.cc b/gcc/prefix.cc -index 096ed5afa3d..2526f0ecc39 100644 +index c2a37bde5ea..33944701ced 100644 --- a/gcc/prefix.cc +++ b/gcc/prefix.cc -@@ -72,7 +72,9 @@ License along with GCC; see the file COPYING3. If not see +@@ -73,7 +73,9 @@ License along with GCC; see the file COPYING3. If not see #include "prefix.h" #include "common/common-target.h" @@ -499,7 +503,7 @@ index 096ed5afa3d..2526f0ecc39 100644 static const char *get_key_value (char *); static char *translate_name (char *); -@@ -212,7 +214,7 @@ translate_name (char *name) +@@ -213,7 +215,7 @@ translate_name (char *name) prefix = getenv (key); if (prefix == 0) diff --git a/meta/recipes-devtools/gcc/gcc/0017-Search-target-sysroot-gcc-version-specific-dirs-with.patch b/meta/recipes-devtools/gcc/gcc/0017-Search-target-sysroot-gcc-version-specific-dirs-with.patch index 9b05da64a7..8a11049ca3 100644 --- a/meta/recipes-devtools/gcc/gcc/0017-Search-target-sysroot-gcc-version-specific-dirs-with.patch +++ b/meta/recipes-devtools/gcc/gcc/0017-Search-target-sysroot-gcc-version-specific-dirs-with.patch @@ -1,4 +1,4 @@ -From 33a1f07a4417247dc24819d4e583ca09f56d5a7b Mon Sep 17 00:00:00 2001 +From 7e095089452b6e895ec40981752e9f902f0ad889 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Mon, 7 Dec 2015 23:41:45 +0000 Subject: [PATCH] Search target sysroot gcc version specific dirs with @@ -42,19 +42,20 @@ binaries can be found first. With this change the search path becomes: <sysroot>/lib32/ <sysroot>/usr/lib32/ -Upstream-Status: Pending RP 2015/7/31 +Upstream-Status: Submitted [https://gcc.gnu.org/pipermail/gcc-patches/2023-April/615320.html] + Signed-off-by: Khem Raj <raj.khem@gmail.com> --- gcc/gcc.cc | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 5569a39a14a..4598f6cd7c9 100644 +index 605fe3b8c0d..c3a1dab38c4 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -2817,7 +2817,7 @@ for_each_path (const struct path_prefix *paths, +@@ -2809,7 +2809,7 @@ for_each_path (const struct path_prefix *paths, if (path == NULL) { len = paths->max_len + extra_space + 1; @@ -63,7 +64,7 @@ index 5569a39a14a..4598f6cd7c9 100644 path = XNEWVEC (char, len); } -@@ -2829,6 +2829,33 @@ for_each_path (const struct path_prefix *paths, +@@ -2821,6 +2821,33 @@ for_each_path (const struct path_prefix *paths, /* Look first in MACHINE/VERSION subdirectory. */ if (!skip_multi_dir) { diff --git a/meta/recipes-devtools/gcc/gcc/0018-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch b/meta/recipes-devtools/gcc/gcc/0018-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch index 56793e03a3..9bc77b485f 100644 --- a/meta/recipes-devtools/gcc/gcc/0018-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch +++ b/meta/recipes-devtools/gcc/gcc/0018-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch @@ -1,4 +1,4 @@ -From d7dc2861840e88a4592817a398a054a886c3f3ee Mon Sep 17 00:00:00 2001 +From bf92b290556b7050df0a001cc7ae43cf79990456 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Tue, 27 Jun 2017 18:10:54 -0700 Subject: [PATCH] Add ssp_nonshared to link commandline for musl targets @@ -13,7 +13,7 @@ are already present in libc_nonshared library therefore we do not need any library helper on glibc based systems but musl needs the libssp_noshared from gcc -Upstream-Status: Pending +Upstream-Status: Submitted [https://gcc.gnu.org/pipermail/gcc-patches/2023-April/615317.html] Signed-off-by: Khem Raj <raj.khem@gmail.com> --- @@ -23,10 +23,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 3 files changed, 27 insertions(+) diff --git a/gcc/config/linux.h b/gcc/config/linux.h -index 58143dff731..d2409ccac26 100644 +index c921cf6ef63..32e1bc1ae2d 100644 --- a/gcc/config/linux.h +++ b/gcc/config/linux.h -@@ -208,6 +208,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +@@ -195,6 +195,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see { GCC_INCLUDE_DIRVAR, "GCC", 0, 1, 0, 0 }, \ { 0, 0, 0, 0, 0, 0 } \ } @@ -41,7 +41,7 @@ index 58143dff731..d2409ccac26 100644 #if (DEFAULT_LIBC == LIBC_UCLIBC) && defined (SINGLE_LIBC) /* uClinux */ diff --git a/gcc/config/rs6000/linux.h b/gcc/config/rs6000/linux.h -index 8c9039ac1e5..259cd485973 100644 +index 5d21befe8e4..1248a68e4ca 100644 --- a/gcc/config/rs6000/linux.h +++ b/gcc/config/rs6000/linux.h @@ -99,6 +99,16 @@ @@ -62,7 +62,7 @@ index 8c9039ac1e5..259cd485973 100644 #define LINK_OS_LINUX_SPEC LINK_OS_LINUX_EMUL " %{!shared: %{!static: \ %{!static-pie: \ diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h -index 364c1a5b155..e33d9ae98e0 100644 +index 2ddab7c99c1..9641580fc83 100644 --- a/gcc/config/rs6000/linux64.h +++ b/gcc/config/rs6000/linux64.h @@ -372,6 +372,16 @@ extern int dot_symbols; diff --git a/meta/recipes-devtools/gcc/gcc/0019-Re-introduce-spe-commandline-options.patch b/meta/recipes-devtools/gcc/gcc/0019-Re-introduce-spe-commandline-options.patch index bb1699be25..f785688661 100644 --- a/meta/recipes-devtools/gcc/gcc/0019-Re-introduce-spe-commandline-options.patch +++ b/meta/recipes-devtools/gcc/gcc/0019-Re-introduce-spe-commandline-options.patch @@ -1,4 +1,4 @@ -From bf0d7c463e1fab62804556099b56319fe94be1eb Mon Sep 17 00:00:00 2001 +From 587ac4a59ea56da18a9989c31a75124e974cb37c Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Wed, 6 Jun 2018 12:10:22 -0700 Subject: [PATCH] Re-introduce spe commandline options @@ -14,10 +14,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 13 insertions(+) diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt -index 4931d781c4e..3fb87b6f7d5 100644 +index bde6d3ff664..5af9640825c 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt -@@ -348,6 +348,19 @@ mdebug= +@@ -344,6 +344,19 @@ mdebug= Target RejectNegative Joined -mdebug= Enable debug output. diff --git a/meta/recipes-devtools/gcc/gcc/0020-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch b/meta/recipes-devtools/gcc/gcc/0020-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch index f37092089f..b86edab5d5 100644 --- a/meta/recipes-devtools/gcc/gcc/0020-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch +++ b/meta/recipes-devtools/gcc/gcc/0020-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch @@ -1,4 +1,4 @@ -From a32c75b37209d6836eaaa943dc6b1207acba5d27 Mon Sep 17 00:00:00 2001 +From 8c4c59521720f8c1b1e38e38896b47fcb1bf00ac Mon Sep 17 00:00:00 2001 From: Szabolcs Nagy <nsz@port70.net> Date: Sat, 24 Oct 2015 20:09:53 +0000 Subject: [PATCH] libgcc_s: Use alias for __cpu_indicator_init instead of @@ -29,7 +29,7 @@ gcc/Changelog: * config/i386/i386-expand.c (ix86_expand_builtin): Make __builtin_cpu_init call __cpu_indicator_init_local instead of __cpu_indicator_init. -Upstream-Status: Pending +Upstream-Status: Submitted [https://gcc.gnu.org/pipermail/gcc-patches/2023-February/612559.html] Signed-off-by: Khem Raj <raj.khem@gmail.com> --- @@ -39,10 +39,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc -index 68978ef8dc2..0c71f36b572 100644 +index 0d817fc3f3b..8d34d19d3f9 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc -@@ -12321,10 +12321,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, +@@ -12691,10 +12691,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, { case IX86_BUILTIN_CPU_INIT: { @@ -56,7 +56,7 @@ index 68978ef8dc2..0c71f36b572 100644 return expand_expr (call_expr, target, mode, EXPAND_NORMAL); } diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c -index dab1d98060f..cf824b4114a 100644 +index 50b6d8248a2..724ced402a1 100644 --- a/libgcc/config/i386/cpuinfo.c +++ b/libgcc/config/i386/cpuinfo.c @@ -63,7 +63,7 @@ __cpu_indicator_init (void) diff --git a/meta/recipes-devtools/gcc/gcc/0021-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch b/meta/recipes-devtools/gcc/gcc/0021-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch index f5f04ae314..b6707592dc 100644 --- a/meta/recipes-devtools/gcc/gcc/0021-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch +++ b/meta/recipes-devtools/gcc/gcc/0021-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch @@ -1,4 +1,4 @@ -From 4efc42b99c96b026f560b0918de7e237ac3dc8d1 Mon Sep 17 00:00:00 2001 +From f15b19d8e058c983c49c4566c1879fdaf5b1ab54 Mon Sep 17 00:00:00 2001 From: Richard Purdie <richard.purdie@linuxfoundation.org> Date: Tue, 10 Mar 2020 08:26:53 -0700 Subject: [PATCH] gentypes/genmodes: Do not use __LINE__ for maintaining @@ -17,10 +17,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 2 files changed, 19 insertions(+), 19 deletions(-) diff --git a/gcc/gengtype.cc b/gcc/gengtype.cc -index 386ae1b0506..9762e914296 100644 +index 7763f40e9ab..4f0c1eb1508 100644 --- a/gcc/gengtype.cc +++ b/gcc/gengtype.cc -@@ -1006,7 +1006,7 @@ create_field_at (pair_p next, type_p type, const char *name, options_p opt, +@@ -1005,7 +1005,7 @@ create_field_at (pair_p next, type_p type, const char *name, options_p opt, /* Create a fake field with the given type and name. NEXT is the next field in the chain. */ #define create_field(next,type,name) \ @@ -29,7 +29,7 @@ index 386ae1b0506..9762e914296 100644 /* Like create_field, but the field is only valid when condition COND is true. */ -@@ -1039,7 +1039,7 @@ create_optional_field_ (pair_p next, type_p type, const char *name, +@@ -1038,7 +1038,7 @@ create_optional_field_ (pair_p next, type_p type, const char *name, } #define create_optional_field(next,type,name,cond) \ @@ -38,7 +38,7 @@ index 386ae1b0506..9762e914296 100644 /* Reverse a linked list of 'struct pair's in place. */ pair_p -@@ -5238,7 +5238,7 @@ main (int argc, char **argv) +@@ -5223,7 +5223,7 @@ main (int argc, char **argv) /* These types are set up with #define or else outside of where we can see them. We should initialize them before calling read_input_list. */ @@ -48,10 +48,10 @@ index 386ae1b0506..9762e914296 100644 POS_HERE (do_scalar_typedef ("CUMULATIVE_ARGS", &pos)); POS_HERE (do_scalar_typedef ("REAL_VALUE_TYPE", &pos)); diff --git a/gcc/genmodes.cc b/gcc/genmodes.cc -index 59850bb070a..e187f8542a1 100644 +index 715787b8f48..302adff28d5 100644 --- a/gcc/genmodes.cc +++ b/gcc/genmodes.cc -@@ -440,7 +440,7 @@ complete_all_modes (void) +@@ -441,7 +441,7 @@ complete_all_modes (void) } /* For each mode in class CLASS, construct a corresponding complex mode. */ @@ -60,7 +60,7 @@ index 59850bb070a..e187f8542a1 100644 static void make_complex_modes (enum mode_class cl, const char *file, unsigned int line) -@@ -499,7 +499,7 @@ make_complex_modes (enum mode_class cl, +@@ -500,7 +500,7 @@ make_complex_modes (enum mode_class cl, having as many components as necessary. ORDER is the sorting order of the mode, with smaller numbers indicating a higher priority. */ #define VECTOR_MODES_WITH_PREFIX(PREFIX, C, W, ORDER) \ @@ -69,7 +69,7 @@ index 59850bb070a..e187f8542a1 100644 #define VECTOR_MODES(C, W) VECTOR_MODES_WITH_PREFIX (V, C, W, 0) static void ATTRIBUTE_UNUSED make_vector_modes (enum mode_class cl, const char *prefix, unsigned int width, -@@ -552,7 +552,7 @@ make_vector_modes (enum mode_class cl, const char *prefix, unsigned int width, +@@ -553,7 +553,7 @@ make_vector_modes (enum mode_class cl, const char *prefix, unsigned int width, BYTESIZE bytes in total. */ #define VECTOR_BOOL_MODE(NAME, COUNT, COMPONENT, BYTESIZE) \ make_vector_bool_mode (#NAME, COUNT, #COMPONENT, BYTESIZE, \ @@ -78,7 +78,7 @@ index 59850bb070a..e187f8542a1 100644 static void ATTRIBUTE_UNUSED make_vector_bool_mode (const char *name, unsigned int count, const char *component, unsigned int bytesize, -@@ -574,7 +574,7 @@ make_vector_bool_mode (const char *name, unsigned int count, +@@ -575,7 +575,7 @@ make_vector_bool_mode (const char *name, unsigned int count, /* Input. */ #define _SPECIAL_MODE(C, N) \ @@ -87,7 +87,7 @@ index 59850bb070a..e187f8542a1 100644 #define RANDOM_MODE(N) _SPECIAL_MODE (RANDOM, N) #define CC_MODE(N) _SPECIAL_MODE (CC, N) -@@ -587,7 +587,7 @@ make_special_mode (enum mode_class cl, const char *name, +@@ -588,7 +588,7 @@ make_special_mode (enum mode_class cl, const char *name, #define INT_MODE(N, Y) FRACTIONAL_INT_MODE (N, -1U, Y) #define FRACTIONAL_INT_MODE(N, B, Y) \ @@ -96,7 +96,7 @@ index 59850bb070a..e187f8542a1 100644 static void make_int_mode (const char *name, -@@ -628,16 +628,16 @@ make_opaque_mode (const char *name, +@@ -629,16 +629,16 @@ make_opaque_mode (const char *name, } #define FRACT_MODE(N, Y, F) \ @@ -117,7 +117,7 @@ index 59850bb070a..e187f8542a1 100644 /* Create a fixed-point mode by setting CL, NAME, BYTESIZE, IBIT, FBIT, FILE, and LINE. */ -@@ -658,7 +658,7 @@ make_fixed_point_mode (enum mode_class cl, +@@ -659,7 +659,7 @@ make_fixed_point_mode (enum mode_class cl, #define FLOAT_MODE(N, Y, F) FRACTIONAL_FLOAT_MODE (N, -1U, Y, F) #define FRACTIONAL_FLOAT_MODE(N, B, Y, F) \ @@ -126,7 +126,7 @@ index 59850bb070a..e187f8542a1 100644 static void make_float_mode (const char *name, -@@ -675,7 +675,7 @@ make_float_mode (const char *name, +@@ -676,7 +676,7 @@ make_float_mode (const char *name, #define DECIMAL_FLOAT_MODE(N, Y, F) \ FRACTIONAL_DECIMAL_FLOAT_MODE (N, -1U, Y, F) #define FRACTIONAL_DECIMAL_FLOAT_MODE(N, B, Y, F) \ @@ -135,7 +135,7 @@ index 59850bb070a..e187f8542a1 100644 static void make_decimal_float_mode (const char *name, -@@ -690,7 +690,7 @@ make_decimal_float_mode (const char *name, +@@ -691,7 +691,7 @@ make_decimal_float_mode (const char *name, } #define RESET_FLOAT_FORMAT(N, F) \ @@ -144,7 +144,7 @@ index 59850bb070a..e187f8542a1 100644 static void ATTRIBUTE_UNUSED reset_float_format (const char *name, const char *format, const char *file, unsigned int line) -@@ -711,7 +711,7 @@ reset_float_format (const char *name, const char *format, +@@ -712,7 +712,7 @@ reset_float_format (const char *name, const char *format, /* __intN support. */ #define INT_N(M,PREC) \ @@ -153,7 +153,7 @@ index 59850bb070a..e187f8542a1 100644 static void ATTRIBUTE_UNUSED make_int_n (const char *m, int bitsize, const char *file, unsigned int line) -@@ -740,7 +740,7 @@ make_int_n (const char *m, int bitsize, +@@ -741,7 +741,7 @@ make_int_n (const char *m, int bitsize, /* Partial integer modes are specified by relation to a full integer mode. */ #define PARTIAL_INT_MODE(M,PREC,NAME) \ @@ -162,7 +162,7 @@ index 59850bb070a..e187f8542a1 100644 static void ATTRIBUTE_UNUSED make_partial_integer_mode (const char *base, const char *name, unsigned int precision, -@@ -767,7 +767,7 @@ make_partial_integer_mode (const char *base, const char *name, +@@ -768,7 +768,7 @@ make_partial_integer_mode (const char *base, const char *name, /* A single vector mode can be specified by naming its component mode and the number of components. */ #define VECTOR_MODE_WITH_PREFIX(PREFIX, C, M, N, ORDER) \ @@ -171,7 +171,7 @@ index 59850bb070a..e187f8542a1 100644 #define VECTOR_MODE(C, M, N) VECTOR_MODE_WITH_PREFIX(V, C, M, N, 0); static void ATTRIBUTE_UNUSED make_vector_mode (enum mode_class bclass, -@@ -814,7 +814,7 @@ make_vector_mode (enum mode_class bclass, +@@ -815,7 +815,7 @@ make_vector_mode (enum mode_class bclass, /* Adjustability. */ #define _ADD_ADJUST(A, M, X, C1, C2) \ diff --git a/meta/recipes-devtools/gcc/gcc/0023-libatomic-Do-not-enforce-march-on-aarch64.patch b/meta/recipes-devtools/gcc/gcc/0022-libatomic-Do-not-enforce-march-on-aarch64.patch index 2f01659847..0ea8aac543 100644 --- a/meta/recipes-devtools/gcc/gcc/0023-libatomic-Do-not-enforce-march-on-aarch64.patch +++ b/meta/recipes-devtools/gcc/gcc/0022-libatomic-Do-not-enforce-march-on-aarch64.patch @@ -1,4 +1,4 @@ -From 52931ec7a708b58d68e69ce9eb99001ae9f099dd Mon Sep 17 00:00:00 2001 +From 939a899b862f7a25e52b74d1587fc75fc65779c0 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Wed, 13 May 2020 15:10:38 -0700 Subject: [PATCH] libatomic: Do not enforce march on aarch64 @@ -17,7 +17,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 2 files changed, 2 deletions(-) diff --git a/libatomic/Makefile.am b/libatomic/Makefile.am -index d88515e4a03..e0e2f8b442a 100644 +index c6c8d81c56a..d959a5d040e 100644 --- a/libatomic/Makefile.am +++ b/libatomic/Makefile.am @@ -125,7 +125,6 @@ libatomic_la_LIBADD = $(foreach s,$(SIZES),$(addsuffix _$(s)_.lo,$(SIZEOBJS))) @@ -26,16 +26,16 @@ index d88515e4a03..e0e2f8b442a 100644 if ARCH_AARCH64_LINUX -IFUNC_OPTIONS = -march=armv8-a+lse libatomic_la_LIBADD += $(foreach s,$(SIZES),$(addsuffix _$(s)_1_.lo,$(SIZEOBJS))) - endif - if ARCH_ARM_LINUX + libatomic_la_SOURCES += atomic_16.S + diff --git a/libatomic/Makefile.in b/libatomic/Makefile.in -index 80d25653dc7..7377689ab34 100644 +index a0fa3dfc8cc..e70d389874a 100644 --- a/libatomic/Makefile.in +++ b/libatomic/Makefile.in -@@ -434,7 +434,6 @@ M_SRC = $(firstword $(filter %/$(M_FILE), $(all_c_files))) +@@ -447,7 +447,6 @@ M_SRC = $(firstword $(filter %/$(M_FILE), $(all_c_files))) libatomic_la_LIBADD = $(foreach s,$(SIZES),$(addsuffix \ - _$(s)_.lo,$(SIZEOBJS))) $(am__append_1) $(am__append_2) \ - $(am__append_3) $(am__append_4) + _$(s)_.lo,$(SIZEOBJS))) $(am__append_1) $(am__append_3) \ + $(am__append_4) $(am__append_5) -@ARCH_AARCH64_LINUX_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -march=armv8-a+lse @ARCH_ARM_LINUX_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -march=armv7-a+fp -DHAVE_KERNEL64 @ARCH_I386_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -march=i586 diff --git a/meta/recipes-devtools/gcc/gcc/0022-mingw32-Enable-operation_not_supported.patch b/meta/recipes-devtools/gcc/gcc/0022-mingw32-Enable-operation_not_supported.patch deleted file mode 100644 index f88ad51ee8..0000000000 --- a/meta/recipes-devtools/gcc/gcc/0022-mingw32-Enable-operation_not_supported.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 061cf79e7b6e89fdf0f2630ddaebbf1d7b271ac3 Mon Sep 17 00:00:00 2001 -From: Khem Raj <raj.khem@gmail.com> -Date: Tue, 12 May 2020 10:39:09 -0700 -Subject: [PATCH] mingw32: Enable operation_not_supported - -Fixes nativesdk build errors on mingw32 gcc-runtime - -Upstream-Status: Pending -Signed-off-by: Khem Raj <raj.khem@gmail.com> ---- - libstdc++-v3/config/os/mingw32/error_constants.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/libstdc++-v3/config/os/mingw32/error_constants.h b/libstdc++-v3/config/os/mingw32/error_constants.h -index da5f4c2ac85..e855c86267c 100644 ---- a/libstdc++-v3/config/os/mingw32/error_constants.h -+++ b/libstdc++-v3/config/os/mingw32/error_constants.h -@@ -107,7 +107,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION - #ifdef EPERM - operation_not_permitted = EPERM, - #endif --// operation_not_supported = EOPNOTSUPP, -+ operation_not_supported = EOPNOTSUPP, - #ifdef EWOULDBLOCK - operation_would_block = EWOULDBLOCK, - #endif diff --git a/meta/recipes-devtools/gcc/gcc/0024-Fix-install-path-of-linux64.h.patch b/meta/recipes-devtools/gcc/gcc/0023-Fix-install-path-of-linux64.h.patch index 555be62328..cd962d82bd 100644 --- a/meta/recipes-devtools/gcc/gcc/0024-Fix-install-path-of-linux64.h.patch +++ b/meta/recipes-devtools/gcc/gcc/0023-Fix-install-path-of-linux64.h.patch @@ -1,4 +1,4 @@ -From 3e67c9c77e46132c252911bf1e5e4222dfd3aa34 Mon Sep 17 00:00:00 2001 +From 696d696381dd99ec2bddb1170f96f98da36eb418 Mon Sep 17 00:00:00 2001 From: Andrei Gherzan <andrei.gherzan@huawei.com> Date: Wed, 22 Dec 2021 12:49:25 +0100 Subject: [PATCH] Fix install path of linux64.h @@ -17,10 +17,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 2 insertions(+) diff --git a/gcc/Makefile.in b/gcc/Makefile.in -index 07fa63b6640..0def7394454 100644 +index 8ef996c0f4d..21daf380e34 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in -@@ -3706,6 +3706,8 @@ install-plugin: installdirs lang.install-plugin s-header-vars install-gengtype +@@ -3731,6 +3731,8 @@ install-plugin: installdirs lang.install-plugin s-header-vars install-gengtype "$(srcdir)"/config/* | "$(srcdir)"/common/config/* \ | "$(srcdir)"/c-family/* | "$(srcdir)"/*.def ) \ base=`echo "$$path" | sed -e "s|$$srcdirstrip/||"`;; \ diff --git a/meta/recipes-devtools/gcc/gcc/0024-Avoid-hardcoded-build-paths-into-ppc-libgcc.patch b/meta/recipes-devtools/gcc/gcc/0024-Avoid-hardcoded-build-paths-into-ppc-libgcc.patch new file mode 100644 index 0000000000..04d940ae0b --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0024-Avoid-hardcoded-build-paths-into-ppc-libgcc.patch @@ -0,0 +1,28 @@ +From 9487b1d6136ea09cce4792d59d0170c712575550 Mon Sep 17 00:00:00 2001 +From: Richard Purdie <richard.purdie@linuxfoundation.org> +Date: Sat, 20 Aug 2022 09:04:14 -0700 +Subject: [PATCH] Avoid hardcoded build paths into ppc libgcc + +Avoid encoding build paths into sources used for floating point on powerpc. +(MACHINE=qemuppc bitbake libgcc). + +Upstream-Status: Submitted [https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599882.html] +Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org> +Signed-off-by: Khem Raj <raj.khem@gmail.com> +--- + libgcc/config/rs6000/t-float128 | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/libgcc/config/rs6000/t-float128 b/libgcc/config/rs6000/t-float128 +index b09b5664af0..513e63748f1 100644 +--- a/libgcc/config/rs6000/t-float128 ++++ b/libgcc/config/rs6000/t-float128 +@@ -103,7 +103,7 @@ $(ibm128_dec_objs) : INTERNAL_CFLAGS += $(IBM128_CFLAGS_DECIMAL) + $(fp128_softfp_src) : $(srcdir)/soft-fp/$(subst -sw,,$(subst kf,tf,$@)) $(fp128_dep) + @src="$(srcdir)/soft-fp/$(subst -sw,,$(subst kf,tf,$@))"; \ + echo "Create $@"; \ +- (echo "/* file created from $$src */"; \ ++ (echo "/* file created from `basename $$src` */"; \ + echo; \ + sed -f $(fp128_sed) < $$src) > $@ + diff --git a/meta/recipes-devtools/gcc/gcc/0025-Move-sched.h-include-ahead-of-user-headers.patch b/meta/recipes-devtools/gcc/gcc/0025-Move-sched.h-include-ahead-of-user-headers.patch deleted file mode 100644 index d4aeacfed5..0000000000 --- a/meta/recipes-devtools/gcc/gcc/0025-Move-sched.h-include-ahead-of-user-headers.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 7422adfb471f4b4f2ec870124064632d55f72e50 Mon Sep 17 00:00:00 2001 -From: Khem Raj <raj.khem@gmail.com> -Date: Mon, 11 Apr 2022 15:46:18 -0700 -Subject: [PATCH] Move sched.h include ahead of user headers - -Fix attempt to use poisoned calloc error, this moves the sched.h before -using system.h from gcc headers which includes #pragma GCC poison calloc - -Fixes -In file included from /mnt/b/yoe/master/build/tmp/work/cortexa72-yoe-linux-musl/gcc/12.0.1-r0/recipe-sysroot/usr/include/pthread.h:30, - from /mnt/b/yoe/master/build/tmp/work/cortexa72-yoe-linux-musl/gcc/12.0.1-r0/recipe-sysroot/usr/include/c++/12.0.1/aarch64-yoe-linux-musl/bits/gthr-default.h:35, - from /mnt/b/yoe/master/build/tmp/work/cortexa72-yoe-linux-musl/gcc/12.0.1-r0/recipe-sysroot/usr/include/c++/12.0.1/aarch64-yoe-linux-musl/bits/gthr.h:148, - from /mnt/b/yoe/master/build/tmp/work/cortexa72-yoe-linux-musl/gcc/12.0.1-r0/recipe-sysroot/usr/include/c++/12.0.1/ext/atomicity.h:35, - from /mnt/b/yoe/master/build/tmp/work/cortexa72-yoe-linux-musl/gcc/12.0.1-r0/recipe-sysroot/usr/include/c++/12.0.1/bits/shared_ptr_base.h:61, - from /mnt/b/yoe/master/build/tmp/work/cortexa72-yoe-linux-musl/gcc/12.0.1-r0/recipe-sysroot/usr/include/c++/12.0.1/bits/shared_ptr.h:53, - from /mnt/b/yoe/master/build/tmp/work/cortexa72-yoe-linux-musl/gcc/12.0.1-r0/recipe-sysroot/usr/include/c++/12.0.1/memory:77, - from ../../../../../../../work-shared/gcc-12.0.1-r0/gcc-12-20220410/libcc1/deleter.hh:23, - from ../../../../../../../work-shared/gcc-12.0.1-r0/gcc-12-20220410/libcc1/rpc.hh:25, - from ../../../../../../../work-shared/gcc-12.0.1-r0/gcc-12-20220410/libcc1/libcc1plugin.cc:67: -/mnt/b/yoe/master/build/tmp/work/cortexa72-yoe-linux-musl/gcc/12.0.1-r0/recipe-sysroot/usr/include/sched.h:84:7: error: attempt to use poisoned "calloc" - 84 | void *calloc(size_t, size_t); - | ^ -/mnt/b/yoe/master/build/tmp/work/cortexa72-yoe-linux-musl/gcc/12.0.1-r0/recipe-sysroot/usr/include/sched.h:124:36: error: attempt to use poisoned "calloc" - 124 | #define CPU_ALLOC(n) ((cpu_set_t *)calloc(1,CPU_ALLOC_SIZE(n))) - -Upstream-Status: Pending -Signed-off-by: Khem Raj <raj.khem@gmail.com> ---- - libcc1/libcc1plugin.cc | 1 + - libcc1/libcp1plugin.cc | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/libcc1/libcc1plugin.cc b/libcc1/libcc1plugin.cc -index 12ab5a57c8d..fff9bfab18b 100644 ---- a/libcc1/libcc1plugin.cc -+++ b/libcc1/libcc1plugin.cc -@@ -17,6 +17,7 @@ - along with GCC; see the file COPYING3. If not see - <http://www.gnu.org/licenses/>. */ - -+#include <sched.h> - #include <cc1plugin-config.h> - - #undef PACKAGE_NAME -diff --git a/libcc1/libcp1plugin.cc b/libcc1/libcp1plugin.cc -index 83dab7f58b1..0b83ce7a09d 100644 ---- a/libcc1/libcp1plugin.cc -+++ b/libcc1/libcp1plugin.cc -@@ -18,6 +18,7 @@ - along with GCC; see the file COPYING3. If not see - <http://www.gnu.org/licenses/>. */ - -+#include <sched.h> - #include <cc1plugin-config.h> - - #undef PACKAGE_NAME diff --git a/meta/recipes-devtools/gcc/gcc/0025-gcc-testsuite-tweaks-for-mips-OE.patch b/meta/recipes-devtools/gcc/gcc/0025-gcc-testsuite-tweaks-for-mips-OE.patch new file mode 100644 index 0000000000..e4d57c27ef --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0025-gcc-testsuite-tweaks-for-mips-OE.patch @@ -0,0 +1,233 @@ +From f12acc6a383546d48da3bdfb2f25ca2adb7976d7 Mon Sep 17 00:00:00 2001 +From: Richard Purdie <richard.purdie@linuxfoundation.org> +Date: Sun, 13 Aug 2023 10:24:05 +0100 +Subject: [PATCH] gcc testsuite tweaks for mips/OE + +Disable loongson-mmi runtine, qemu doesn't appear to fully support them even if some +of the instruction decoding is there. + +Also disable MSA mips runtime extensions. For some reason qemu appears to accept the test +code when it shouldn't. Our selected MIPS cpu for QEMU doesn't support them. + +MIPS is unusual in the gcc testsuite as it uses EFFECTIVE_TARGETS and loops +multiple times through the vector testsuite. In the case of the two above, we can +compile/link them but not run them. Even with the runtime disabled, if the code +marks it as a runtime test, it will elevate itself to that. Setting the default +target to compile therefore isn't enough. + +Therefore add code to downgrade runtime tests to link tests if the hardware +support isn't there to run them. This avoids thousands of test failures. To do +this we have to hook downgrade code into the main test runner. + +Enable that downgrading for other cases where hardware to run vector extensions is +unavailable to remove test failures on other architectures too. + +Also, for gcc.target tests, add checks on wheter loongson or msa code can +be run before trying that, allowing downgrading of tests there to work too. + +Upstream-Status: Pending +[Parts of the patch may be able to be split off and acceptable to upstream with +discussion. Need to investigate why qemu-user passes the 'bad' instructions'] + +Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org> +--- + gcc/testsuite/gcc.target/mips/mips.exp | 16 +++++++++ + gcc/testsuite/lib/gcc-dg.exp | 11 +++++++ + gcc/testsuite/lib/target-supports.exp | 45 ++++++++------------------ + 3 files changed, 41 insertions(+), 31 deletions(-) + +diff --git a/gcc/testsuite/gcc.target/mips/mips.exp b/gcc/testsuite/gcc.target/mips/mips.exp +index 15d574202d3..2cef9709774 100644 +--- a/gcc/testsuite/gcc.target/mips/mips.exp ++++ b/gcc/testsuite/gcc.target/mips/mips.exp +@@ -709,7 +709,23 @@ proc mips_first_unsupported_option { upstatus } { + global mips_option_tests + upvar $upstatus status + ++ if { [mips_have_test_option_p status "-mmsa"] } { ++ verbose -log "Found -mmsa" ++ if { ![check_mips_msa_hw_available] } { ++ verbose -log "No MSA avail" ++ return "-mmsa" ++ } ++ } ++ if { [mips_have_test_option_p status "-mloongson-mmi"] } { ++ verbose -log "Found -mloonson-mmi" ++ if { ![check_mips_loongson_mmi_hw_available] } { ++ verbose -log "No MMI avail" ++ return "-mloonson-mmi" ++ } ++ } ++ + foreach { option code } [array get mips_option_tests] { ++ + if { [mips_have_test_option_p status $option] } { + regsub -all "\n" $code "\\n\\\n" asm + # Use check_runtime from target-supports.exp, which caches +diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp +index 9d79b9402e9..e0e5cbb1af8 100644 +--- a/gcc/testsuite/lib/gcc-dg.exp ++++ b/gcc/testsuite/lib/gcc-dg.exp +@@ -240,9 +240,20 @@ proc schedule-cleanups { opts } { + + proc gcc-dg-test-1 { target_compile prog do_what extra_tool_flags } { + # Set up the compiler flags, based on what we're going to do. ++ global do-what-limit + + set options [list] + ++ if [info exists do-what-limit] then { ++ # Demote run tests to $do-what-limit if set ++ switch $do_what { ++ run { ++ set do_what ${do-what-limit} ++ set dg-do-what ${do-what-limit} ++ } ++ } ++ } ++ + switch $do_what { + "preprocess" { + set compile_type "preprocess" +diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp +index 40f71e9ed8b..10e267fa16d 100644 +--- a/gcc/testsuite/lib/target-supports.exp ++++ b/gcc/testsuite/lib/target-supports.exp +@@ -2155,14 +2155,7 @@ proc check_mips_loongson_mmi_hw_available { } { + if { !([istarget mips*-*-*]) } { + expr 0 + } else { +- check_runtime_nocache mips_loongson_mmi_hw_available { +- #include <loongson-mmiintrin.h> +- int main() +- { +- asm volatile ("paddw $f2,$f4,$f6"); +- return 0; +- } +- } "-mloongson-mmi" ++ expr 0 + } + }] + } +@@ -2176,29 +2169,7 @@ proc check_mips_msa_hw_available { } { + if { !([istarget mips*-*-*]) } { + expr 0 + } else { +- check_runtime_nocache mips_msa_hw_available { +- #if !defined(__mips_msa) +- #error "MSA NOT AVAIL" +- #else +- #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2)) +- #error "MSA NOT AVAIL FOR ISA REV < 2" +- #endif +- #if !defined(__mips_hard_float) +- #error "MSA HARD_FLOAT REQUIRED" +- #endif +- #if __mips_fpr != 64 +- #error "MSA 64-bit FPR REQUIRED" +- #endif +- #include <msa.h> +- +- int main() +- { +- v8i16 v = __builtin_msa_ldi_h (0); +- v[0] = 0; +- return v[0]; +- } +- #endif +- } "-mmsa" ++ expr 0 + } + }] + } +@@ -9187,6 +9158,7 @@ proc is-effective-target-keyword { arg } { + + proc et-dg-runtest { runtest testcases flags default-extra-flags } { + global dg-do-what-default ++ global do-what-limit + global EFFECTIVE_TARGETS + global et_index + +@@ -9194,6 +9166,7 @@ proc et-dg-runtest { runtest testcases flags default-extra-flags } { + foreach target $EFFECTIVE_TARGETS { + set target_flags $flags + set dg-do-what-default compile ++ set do-what-limit link + set et_index [lsearch -exact $EFFECTIVE_TARGETS $target] + if { [info procs add_options_for_${target}] != [list] } { + set target_flags [add_options_for_${target} "$flags"] +@@ -9201,8 +9174,10 @@ proc et-dg-runtest { runtest testcases flags default-extra-flags } { + if { [info procs check_effective_target_${target}_runtime] + != [list] && [check_effective_target_${target}_runtime] } { + set dg-do-what-default run ++ set do-what-limit run + } + $runtest $testcases $target_flags ${default-extra-flags} ++ unset do-what-limit + } + } else { + set et_index 0 +@@ -10789,6 +10764,7 @@ proc check_effective_target_sigsetjmp {} { + proc check_vect_support_and_set_flags { } { + global DEFAULT_VECTCFLAGS + global dg-do-what-default ++ global do-what-limit + global EFFECTIVE_TARGETS + + if [istarget powerpc-*paired*] { +@@ -10797,6 +10773,7 @@ proc check_vect_support_and_set_flags { } { + set dg-do-what-default run + } else { + set dg-do-what-default compile ++ set do-what-limit link + } + } elseif [istarget powerpc*-*-*] { + # Skip targets not supporting -maltivec. +@@ -10821,6 +10798,7 @@ proc check_vect_support_and_set_flags { } { + lappend DEFAULT_VECTCFLAGS "-mcpu=970" + } + set dg-do-what-default compile ++ set do-what-limit link + } + } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } { + lappend DEFAULT_VECTCFLAGS "-msse2" +@@ -10828,6 +10806,7 @@ proc check_vect_support_and_set_flags { } { + set dg-do-what-default run + } else { + set dg-do-what-default compile ++ set do-what-limit link + } + } elseif { [istarget mips*-*-*] + && [check_effective_target_nomips16] } { +@@ -10847,6 +10826,7 @@ proc check_vect_support_and_set_flags { } { + set dg-do-what-default run + } else { + set dg-do-what-default compile ++ set do-what-limit link + } + } elseif [istarget alpha*-*-*] { + # Alpha's vectorization capabilities are extremely limited. +@@ -10860,6 +10840,7 @@ proc check_vect_support_and_set_flags { } { + set dg-do-what-default run + } else { + set dg-do-what-default compile ++ set do-what-limit link + } + } elseif [istarget ia64-*-*] { + set dg-do-what-default run +@@ -10873,6 +10854,7 @@ proc check_vect_support_and_set_flags { } { + set dg-do-what-default run + } else { + set dg-do-what-default compile ++ set do-what-limit link + } + } elseif [istarget aarch64*-*-*] { + set dg-do-what-default run +@@ -10897,6 +10879,7 @@ proc check_vect_support_and_set_flags { } { + } else { + lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch" + set dg-do-what-default compile ++ set do-what-limit link + } + } elseif [istarget amdgcn-*-*] { + set dg-do-what-default run diff --git a/meta/recipes-devtools/gcc/gcc/0026-aarch64-Fix-loose-ldpstp-check-PR111411.patch b/meta/recipes-devtools/gcc/gcc/0026-aarch64-Fix-loose-ldpstp-check-PR111411.patch new file mode 100644 index 0000000000..a408a98698 --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0026-aarch64-Fix-loose-ldpstp-check-PR111411.patch @@ -0,0 +1,117 @@ +From adb60dc78e0da4877747f32347cee339364775be Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Fri, 15 Sep 2023 09:19:14 +0100 +Subject: [PATCH] aarch64: Fix loose ldpstp check [PR111411] + +aarch64_operands_ok_for_ldpstp contained the code: + + /* One of the memory accesses must be a mempair operand. + If it is not the first one, they need to be swapped by the + peephole. */ + if (!aarch64_mem_pair_operand (mem_1, GET_MODE (mem_1)) + && !aarch64_mem_pair_operand (mem_2, GET_MODE (mem_2))) + return false; + +But the requirement isn't just that one of the accesses must be a +valid mempair operand. It's that the lower access must be, since +that's the access that will be used for the instruction operand. + +gcc/ + PR target/111411 + * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require + the lower memory access to a mem-pair operand. + +gcc/testsuite/ + PR target/111411 + * gcc.dg/rtl/aarch64/pr111411.c: New test. + +Upstream-Status: Backport [https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=2d38f45bcca62ca0c7afef4b579f82c5c2a01610] +Signed-off-by: Martin Jansa <martin.jansa@gmail.com> +--- + gcc/config/aarch64/aarch64.cc | 8 ++- + gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c | 57 +++++++++++++++++++++ + 2 files changed, 60 insertions(+), 5 deletions(-) + create mode 100644 gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 6118a3354ac..9b1f791ca8b 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -26154,11 +26154,9 @@ aarch64_operands_ok_for_ldpstp (rtx *operands, bool load, + gcc_assert (known_eq (GET_MODE_SIZE (GET_MODE (mem_1)), + GET_MODE_SIZE (GET_MODE (mem_2)))); + +- /* One of the memory accesses must be a mempair operand. +- If it is not the first one, they need to be swapped by the +- peephole. */ +- if (!aarch64_mem_pair_operand (mem_1, GET_MODE (mem_1)) +- && !aarch64_mem_pair_operand (mem_2, GET_MODE (mem_2))) ++ /* The lower memory access must be a mem-pair operand. */ ++ rtx lower_mem = reversed ? mem_2 : mem_1; ++ if (!aarch64_mem_pair_operand (lower_mem, GET_MODE (lower_mem))) + return false; + + if (REG_P (reg_1) && FP_REGNUM_P (REGNO (reg_1))) +diff --git a/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c b/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c +new file mode 100644 +index 00000000000..ad07e9c6c89 +--- /dev/null ++++ b/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c +@@ -0,0 +1,57 @@ ++/* { dg-do compile { target aarch64*-*-* } } */ ++/* { dg-require-effective-target lp64 } */ ++/* { dg-options "-O -fdisable-rtl-postreload -fpeephole2 -fno-schedule-fusion" } */ ++ ++extern int data[]; ++ ++void __RTL (startwith ("ira")) foo (void *ptr) ++{ ++ (function "foo" ++ (param "ptr" ++ (DECL_RTL (reg/v:DI <0> [ ptr ])) ++ (DECL_RTL_INCOMING (reg/v:DI x0 [ ptr ])) ++ ) ;; param "ptr" ++ (insn-chain ++ (block 2 ++ (edge-from entry (flags "FALLTHRU")) ++ (cnote 3 [bb 2] NOTE_INSN_BASIC_BLOCK) ++ (insn 4 (set (reg:DI <0>) (reg:DI x0))) ++ (insn 5 (set (reg:DI <1>) ++ (plus:DI (reg:DI <0>) (const_int 768)))) ++ (insn 6 (set (mem:SI (plus:DI (reg:DI <0>) ++ (const_int 508)) [1 &data+508 S4 A4]) ++ (const_int 0))) ++ (insn 7 (set (mem:SI (plus:DI (reg:DI <1>) ++ (const_int -256)) [1 &data+512 S4 A4]) ++ (const_int 0))) ++ (edge-to exit (flags "FALLTHRU")) ++ ) ;; block 2 ++ ) ;; insn-chain ++ ) ;; function ++} ++ ++void __RTL (startwith ("ira")) bar (void *ptr) ++{ ++ (function "bar" ++ (param "ptr" ++ (DECL_RTL (reg/v:DI <0> [ ptr ])) ++ (DECL_RTL_INCOMING (reg/v:DI x0 [ ptr ])) ++ ) ;; param "ptr" ++ (insn-chain ++ (block 2 ++ (edge-from entry (flags "FALLTHRU")) ++ (cnote 3 [bb 2] NOTE_INSN_BASIC_BLOCK) ++ (insn 4 (set (reg:DI <0>) (reg:DI x0))) ++ (insn 5 (set (reg:DI <1>) ++ (plus:DI (reg:DI <0>) (const_int 768)))) ++ (insn 6 (set (mem:SI (plus:DI (reg:DI <1>) ++ (const_int -256)) [1 &data+512 S4 A4]) ++ (const_int 0))) ++ (insn 7 (set (mem:SI (plus:DI (reg:DI <0>) ++ (const_int 508)) [1 &data+508 S4 A4]) ++ (const_int 0))) ++ (edge-to exit (flags "FALLTHRU")) ++ ) ;; block 2 ++ ) ;; insn-chain ++ ) ;; function ++} diff --git a/meta/recipes-devtools/gcc/gcc/0027-Fix-gcc-vect-module-testcases.patch b/meta/recipes-devtools/gcc/gcc/0027-Fix-gcc-vect-module-testcases.patch new file mode 100644 index 0000000000..4b89036814 --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0027-Fix-gcc-vect-module-testcases.patch @@ -0,0 +1,26 @@ +Upstream-Status: Backport [https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=948dbc5ee45f9ffd5f41fd6782704081cc7c8c27] + +Signed-off-by: Harish Sadineni <Harish.Sadineni@windriver.com> + +diff --git a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c +index ed63ff59cc0..009c849b7e7 100644 +--- a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c ++++ b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c +@@ -1,3 +1,5 @@ ++/* Since this uses dg-additional-sources, need to specify `dg-do run` instead of the default. */ ++/* { dg-do run } */ + /* { dg-require-effective-target vect_simd_clones } */ + /* { dg-additional-options "-fopenmp-simd" } */ + /* { dg-additional-options "-mavx" { target avx_runtime } } */ +diff --git a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-12.c b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-12.c +index c44471e35bc..4699a3f3c80 100644 +--- a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-12.c ++++ b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-12.c +@@ -1,3 +1,5 @@ ++/* Since this uses dg-additional-sources, need to specify `dg-do run` instead of the default. */ ++/* { dg-do run } */ + /* { dg-require-effective-target vect_simd_clones } */ + /* { dg-additional-options "-fopenmp-simd" } */ + /* { dg-additional-options "-mavx" { target avx_runtime } } */ +-- +2.43.0 diff --git a/meta/recipes-devtools/gcc/gcc/CVE-2023-4039.patch b/meta/recipes-devtools/gcc/gcc/CVE-2023-4039.patch new file mode 100644 index 0000000000..81b5067c33 --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/CVE-2023-4039.patch @@ -0,0 +1,3093 @@ +From: Richard Sandiford <richard.sandiford@arm.com> +Subject: [PATCH 00/19] aarch64: Fix -fstack-protector issue +Date: Tue, 12 Sep 2023 16:25:10 +0100 + +This series of patches fixes deficiencies in GCC's -fstack-protector +implementation for AArch64 when using dynamically allocated stack space. +This is CVE-2023-4039. See: + +https://developer.arm.com/Arm%20Security%20Center/GCC%20Stack%20Protector%20Vulnerability%20AArch64 +https://github.com/metaredteam/external-disclosures/security/advisories/GHSA-x7ch-h5rf-w2mf + +for more details. + +The fix is to put the saved registers above the locals area when +-fstack-protector is used. + +The series also fixes a stack-clash problem that I found while working +on the CVE. In unpatched sources, the stack-clash problem would only +trigger for unrealistic numbers of arguments (8K 64-bit arguments, or an +equivalent). But it would be a more significant issue with the new +-fstack-protector frame layout. It's therefore important that both +problems are fixed together. + +Some reorganisation of the code seemed necessary to fix the problems in a +cleanish way. The series is therefore quite long, but only a handful of +patches should have any effect on code generation. + +See the individual patches for a detailed description. + +Tested on aarch64-linux-gnu. Pushed to trunk and to all active branches. +I've also pushed backports to GCC 7+ to vendors/ARM/heads/CVE-2023-4039. + +CVE: CVE-2023-4039 +Upstream-Status: Backport +Signed-off-by: Ross Burton <ross.burton@arm.com> + + +From 71a2aa2127283f450c623d3604dbcabe0e14a8d4 Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:12 +0100 +Subject: [PATCH 01/19] aarch64: Use local frame vars in shrink-wrapping code + +aarch64_layout_frame uses a shorthand for referring to +cfun->machine->frame: + + aarch64_frame &frame = cfun->machine->frame; + +This patch does the same for some other heavy users of the structure. +No functional change intended. + +gcc/ + * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use + a local shorthand for cfun->machine->frame. + (aarch64_restore_callee_saves, aarch64_get_separate_components): + (aarch64_process_components): Likewise. + (aarch64_allocate_and_probe_stack_space): Likewise. + (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise. + (aarch64_layout_frame): Use existing shorthand for one more case. +--- + gcc/config/aarch64/aarch64.cc | 123 ++++++++++++++++++---------------- + 1 file changed, 64 insertions(+), 59 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 822a2b49a46..5d473d161d9 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8612,7 +8612,7 @@ aarch64_layout_frame (void) + frame.is_scs_enabled + = (!crtl->calls_eh_return + && sanitize_flags_p (SANITIZE_SHADOW_CALL_STACK) +- && known_ge (cfun->machine->frame.reg_offset[LR_REGNUM], 0)); ++ && known_ge (frame.reg_offset[LR_REGNUM], 0)); + + /* When shadow call stack is enabled, the scs_pop in the epilogue will + restore x30, and we don't need to pop x30 again in the traditional +@@ -9078,6 +9078,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, + unsigned start, unsigned limit, bool skip_wb, + bool hard_fp_valid_p) + { ++ aarch64_frame &frame = cfun->machine->frame; + rtx_insn *insn; + unsigned regno; + unsigned regno2; +@@ -9092,8 +9093,8 @@ aarch64_save_callee_saves (poly_int64 start_offset, + bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno); + + if (skip_wb +- && (regno == cfun->machine->frame.wb_push_candidate1 +- || regno == cfun->machine->frame.wb_push_candidate2)) ++ && (regno == frame.wb_push_candidate1 ++ || regno == frame.wb_push_candidate2)) + continue; + + if (cfun->machine->reg_is_wrapped_separately[regno]) +@@ -9101,7 +9102,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, + + machine_mode mode = aarch64_reg_save_mode (regno); + reg = gen_rtx_REG (mode, regno); +- offset = start_offset + cfun->machine->frame.reg_offset[regno]; ++ offset = start_offset + frame.reg_offset[regno]; + rtx base_rtx = stack_pointer_rtx; + poly_int64 sp_offset = offset; + +@@ -9114,7 +9115,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, + { + gcc_assert (known_eq (start_offset, 0)); + poly_int64 fp_offset +- = cfun->machine->frame.below_hard_fp_saved_regs_size; ++ = frame.below_hard_fp_saved_regs_size; + if (hard_fp_valid_p) + base_rtx = hard_frame_pointer_rtx; + else +@@ -9136,8 +9137,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, + && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit + && !cfun->machine->reg_is_wrapped_separately[regno2] + && known_eq (GET_MODE_SIZE (mode), +- cfun->machine->frame.reg_offset[regno2] +- - cfun->machine->frame.reg_offset[regno])) ++ frame.reg_offset[regno2] - frame.reg_offset[regno])) + { + rtx reg2 = gen_rtx_REG (mode, regno2); + rtx mem2; +@@ -9187,6 +9187,7 @@ static void + aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, + unsigned limit, bool skip_wb, rtx *cfi_ops) + { ++ aarch64_frame &frame = cfun->machine->frame; + unsigned regno; + unsigned regno2; + poly_int64 offset; +@@ -9203,13 +9204,13 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, + rtx reg, mem; + + if (skip_wb +- && (regno == cfun->machine->frame.wb_pop_candidate1 +- || regno == cfun->machine->frame.wb_pop_candidate2)) ++ && (regno == frame.wb_pop_candidate1 ++ || regno == frame.wb_pop_candidate2)) + continue; + + machine_mode mode = aarch64_reg_save_mode (regno); + reg = gen_rtx_REG (mode, regno); +- offset = start_offset + cfun->machine->frame.reg_offset[regno]; ++ offset = start_offset + frame.reg_offset[regno]; + rtx base_rtx = stack_pointer_rtx; + if (mode == VNx2DImode && BYTES_BIG_ENDIAN) + aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, +@@ -9220,8 +9221,7 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, + && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit + && !cfun->machine->reg_is_wrapped_separately[regno2] + && known_eq (GET_MODE_SIZE (mode), +- cfun->machine->frame.reg_offset[regno2] +- - cfun->machine->frame.reg_offset[regno])) ++ frame.reg_offset[regno2] - frame.reg_offset[regno])) + { + rtx reg2 = gen_rtx_REG (mode, regno2); + rtx mem2; +@@ -9326,6 +9326,7 @@ offset_12bit_unsigned_scaled_p (machine_mode mode, poly_int64 offset) + static sbitmap + aarch64_get_separate_components (void) + { ++ aarch64_frame &frame = cfun->machine->frame; + sbitmap components = sbitmap_alloc (LAST_SAVED_REGNUM + 1); + bitmap_clear (components); + +@@ -9342,18 +9343,18 @@ aarch64_get_separate_components (void) + if (mode == VNx2DImode && BYTES_BIG_ENDIAN) + continue; + +- poly_int64 offset = cfun->machine->frame.reg_offset[regno]; ++ poly_int64 offset = frame.reg_offset[regno]; + + /* If the register is saved in the first SVE save slot, we use + it as a stack probe for -fstack-clash-protection. */ + if (flag_stack_clash_protection +- && maybe_ne (cfun->machine->frame.below_hard_fp_saved_regs_size, 0) ++ && maybe_ne (frame.below_hard_fp_saved_regs_size, 0) + && known_eq (offset, 0)) + continue; + + /* Get the offset relative to the register we'll use. */ + if (frame_pointer_needed) +- offset -= cfun->machine->frame.below_hard_fp_saved_regs_size; ++ offset -= frame.below_hard_fp_saved_regs_size; + else + offset += crtl->outgoing_args_size; + +@@ -9372,11 +9373,11 @@ aarch64_get_separate_components (void) + /* If the spare predicate register used by big-endian SVE code + is call-preserved, it must be saved in the main prologue + before any saves that use it. */ +- if (cfun->machine->frame.spare_pred_reg != INVALID_REGNUM) +- bitmap_clear_bit (components, cfun->machine->frame.spare_pred_reg); ++ if (frame.spare_pred_reg != INVALID_REGNUM) ++ bitmap_clear_bit (components, frame.spare_pred_reg); + +- unsigned reg1 = cfun->machine->frame.wb_push_candidate1; +- unsigned reg2 = cfun->machine->frame.wb_push_candidate2; ++ unsigned reg1 = frame.wb_push_candidate1; ++ unsigned reg2 = frame.wb_push_candidate2; + /* If registers have been chosen to be stored/restored with + writeback don't interfere with them to avoid having to output explicit + stack adjustment instructions. */ +@@ -9485,6 +9486,7 @@ aarch64_get_next_set_bit (sbitmap bmp, unsigned int start) + static void + aarch64_process_components (sbitmap components, bool prologue_p) + { ++ aarch64_frame &frame = cfun->machine->frame; + rtx ptr_reg = gen_rtx_REG (Pmode, frame_pointer_needed + ? HARD_FRAME_POINTER_REGNUM + : STACK_POINTER_REGNUM); +@@ -9499,9 +9501,9 @@ aarch64_process_components (sbitmap components, bool prologue_p) + machine_mode mode = aarch64_reg_save_mode (regno); + + rtx reg = gen_rtx_REG (mode, regno); +- poly_int64 offset = cfun->machine->frame.reg_offset[regno]; ++ poly_int64 offset = frame.reg_offset[regno]; + if (frame_pointer_needed) +- offset -= cfun->machine->frame.below_hard_fp_saved_regs_size; ++ offset -= frame.below_hard_fp_saved_regs_size; + else + offset += crtl->outgoing_args_size; + +@@ -9526,14 +9528,14 @@ aarch64_process_components (sbitmap components, bool prologue_p) + break; + } + +- poly_int64 offset2 = cfun->machine->frame.reg_offset[regno2]; ++ poly_int64 offset2 = frame.reg_offset[regno2]; + /* The next register is not of the same class or its offset is not + mergeable with the current one into a pair. */ + if (aarch64_sve_mode_p (mode) + || !satisfies_constraint_Ump (mem) + || GP_REGNUM_P (regno) != GP_REGNUM_P (regno2) + || (crtl->abi->id () == ARM_PCS_SIMD && FP_REGNUM_P (regno)) +- || maybe_ne ((offset2 - cfun->machine->frame.reg_offset[regno]), ++ || maybe_ne ((offset2 - frame.reg_offset[regno]), + GET_MODE_SIZE (mode))) + { + insn = emit_insn (set); +@@ -9555,7 +9557,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) + /* REGNO2 can be saved/restored in a pair with REGNO. */ + rtx reg2 = gen_rtx_REG (mode, regno2); + if (frame_pointer_needed) +- offset2 -= cfun->machine->frame.below_hard_fp_saved_regs_size; ++ offset2 -= frame.below_hard_fp_saved_regs_size; + else + offset2 += crtl->outgoing_args_size; + rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); +@@ -9650,6 +9652,7 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, + bool frame_related_p, + bool final_adjustment_p) + { ++ aarch64_frame &frame = cfun->machine->frame; + HOST_WIDE_INT guard_size + = 1 << param_stack_clash_protection_guard_size; + HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD; +@@ -9670,25 +9673,25 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, + register as a probe. We can't assume that LR was saved at position 0 + though, so treat any space below it as unprobed. */ + if (final_adjustment_p +- && known_eq (cfun->machine->frame.below_hard_fp_saved_regs_size, 0)) ++ && known_eq (frame.below_hard_fp_saved_regs_size, 0)) + { +- poly_int64 lr_offset = cfun->machine->frame.reg_offset[LR_REGNUM]; ++ poly_int64 lr_offset = frame.reg_offset[LR_REGNUM]; + if (known_ge (lr_offset, 0)) + min_probe_threshold -= lr_offset.to_constant (); + else + gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0)); + } + +- poly_int64 frame_size = cfun->machine->frame.frame_size; ++ poly_int64 frame_size = frame.frame_size; + + /* We should always have a positive probe threshold. */ + gcc_assert (min_probe_threshold > 0); + + if (flag_stack_clash_protection && !final_adjustment_p) + { +- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; +- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; +- poly_int64 final_adjust = cfun->machine->frame.final_adjust; ++ poly_int64 initial_adjust = frame.initial_adjust; ++ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; ++ poly_int64 final_adjust = frame.final_adjust; + + if (known_eq (frame_size, 0)) + { +@@ -9977,17 +9980,18 @@ aarch64_epilogue_uses (int regno) + void + aarch64_expand_prologue (void) + { +- poly_int64 frame_size = cfun->machine->frame.frame_size; +- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; +- HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust; +- poly_int64 final_adjust = cfun->machine->frame.final_adjust; +- poly_int64 callee_offset = cfun->machine->frame.callee_offset; +- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; ++ aarch64_frame &frame = cfun->machine->frame; ++ poly_int64 frame_size = frame.frame_size; ++ poly_int64 initial_adjust = frame.initial_adjust; ++ HOST_WIDE_INT callee_adjust = frame.callee_adjust; ++ poly_int64 final_adjust = frame.final_adjust; ++ poly_int64 callee_offset = frame.callee_offset; ++ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; + poly_int64 below_hard_fp_saved_regs_size +- = cfun->machine->frame.below_hard_fp_saved_regs_size; +- unsigned reg1 = cfun->machine->frame.wb_push_candidate1; +- unsigned reg2 = cfun->machine->frame.wb_push_candidate2; +- bool emit_frame_chain = cfun->machine->frame.emit_frame_chain; ++ = frame.below_hard_fp_saved_regs_size; ++ unsigned reg1 = frame.wb_push_candidate1; ++ unsigned reg2 = frame.wb_push_candidate2; ++ bool emit_frame_chain = frame.emit_frame_chain; + rtx_insn *insn; + + if (flag_stack_clash_protection && known_eq (callee_adjust, 0)) +@@ -10018,7 +10022,7 @@ aarch64_expand_prologue (void) + } + + /* Push return address to shadow call stack. */ +- if (cfun->machine->frame.is_scs_enabled) ++ if (frame.is_scs_enabled) + emit_insn (gen_scs_push ()); + + if (flag_stack_usage_info) +@@ -10057,7 +10061,7 @@ aarch64_expand_prologue (void) + + /* The offset of the frame chain record (if any) from the current SP. */ + poly_int64 chain_offset = (initial_adjust + callee_adjust +- - cfun->machine->frame.hard_fp_offset); ++ - frame.hard_fp_offset); + gcc_assert (known_ge (chain_offset, 0)); + + /* The offset of the bottom of the save area from the current SP. */ +@@ -10160,16 +10164,17 @@ aarch64_use_return_insn_p (void) + void + aarch64_expand_epilogue (bool for_sibcall) + { +- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; +- HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust; +- poly_int64 final_adjust = cfun->machine->frame.final_adjust; +- poly_int64 callee_offset = cfun->machine->frame.callee_offset; +- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; ++ aarch64_frame &frame = cfun->machine->frame; ++ poly_int64 initial_adjust = frame.initial_adjust; ++ HOST_WIDE_INT callee_adjust = frame.callee_adjust; ++ poly_int64 final_adjust = frame.final_adjust; ++ poly_int64 callee_offset = frame.callee_offset; ++ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; + poly_int64 below_hard_fp_saved_regs_size +- = cfun->machine->frame.below_hard_fp_saved_regs_size; +- unsigned reg1 = cfun->machine->frame.wb_pop_candidate1; +- unsigned reg2 = cfun->machine->frame.wb_pop_candidate2; +- unsigned int last_gpr = (cfun->machine->frame.is_scs_enabled ++ = frame.below_hard_fp_saved_regs_size; ++ unsigned reg1 = frame.wb_pop_candidate1; ++ unsigned reg2 = frame.wb_pop_candidate2; ++ unsigned int last_gpr = (frame.is_scs_enabled + ? R29_REGNUM : R30_REGNUM); + rtx cfi_ops = NULL; + rtx_insn *insn; +@@ -10203,7 +10208,7 @@ aarch64_expand_epilogue (bool for_sibcall) + /* We need to add memory barrier to prevent read from deallocated stack. */ + bool need_barrier_p + = maybe_ne (get_frame_size () +- + cfun->machine->frame.saved_varargs_size, 0); ++ + frame.saved_varargs_size, 0); + + /* Emit a barrier to prevent loads from a deallocated stack. */ + if (maybe_gt (final_adjust, crtl->outgoing_args_size) +@@ -10284,7 +10289,7 @@ aarch64_expand_epilogue (bool for_sibcall) + } + + /* Pop return address from shadow call stack. */ +- if (cfun->machine->frame.is_scs_enabled) ++ if (frame.is_scs_enabled) + { + machine_mode mode = aarch64_reg_save_mode (R30_REGNUM); + rtx reg = gen_rtx_REG (mode, R30_REGNUM); +@@ -12740,24 +12745,24 @@ aarch64_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to) + poly_int64 + aarch64_initial_elimination_offset (unsigned from, unsigned to) + { ++ aarch64_frame &frame = cfun->machine->frame; ++ + if (to == HARD_FRAME_POINTER_REGNUM) + { + if (from == ARG_POINTER_REGNUM) +- return cfun->machine->frame.hard_fp_offset; ++ return frame.hard_fp_offset; + + if (from == FRAME_POINTER_REGNUM) +- return cfun->machine->frame.hard_fp_offset +- - cfun->machine->frame.locals_offset; ++ return frame.hard_fp_offset - frame.locals_offset; + } + + if (to == STACK_POINTER_REGNUM) + { + if (from == FRAME_POINTER_REGNUM) +- return cfun->machine->frame.frame_size +- - cfun->machine->frame.locals_offset; ++ return frame.frame_size - frame.locals_offset; + } + +- return cfun->machine->frame.frame_size; ++ return frame.frame_size; + } + + +-- +2.34.1 + + +From 89a9fa287706c5011f61926eaf65e7b996b963a3 Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:12 +0100 +Subject: [PATCH 02/19] aarch64: Avoid a use of callee_offset + +When we emit the frame chain, i.e. when we reach Here in this statement +of aarch64_expand_prologue: + + if (emit_frame_chain) + { + // Here + ... + } + +the stack is in one of two states: + +- We've allocated up to the frame chain, but no more. + +- We've allocated the whole frame, and the frame chain is within easy + reach of the new SP. + +The offset of the frame chain from the current SP is available +in aarch64_frame as callee_offset. It is also available as the +chain_offset local variable, where the latter is calculated from other +data. (However, chain_offset is not always equal to callee_offset when +!emit_frame_chain, so chain_offset isn't redundant.) + +In c600df9a4060da3c6121ff4d0b93f179eafd69d1 I switched to using +chain_offset for the initialisation of the hard frame pointer: + + aarch64_add_offset (Pmode, hard_frame_pointer_rtx, +- stack_pointer_rtx, callee_offset, ++ stack_pointer_rtx, chain_offset, + tmp1_rtx, tmp0_rtx, frame_pointer_needed); + +But the later REG_CFA_ADJUST_CFA handling still used callee_offset. + +I think the difference is harmless, but it's more logical for the +CFA note to be in sync, and it's more convenient for later patches +if it uses chain_offset. + +gcc/ + * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use + chain_offset rather than callee_offset. +--- + gcc/config/aarch64/aarch64.cc | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 5d473d161d9..4f233c95140 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -9985,7 +9985,6 @@ aarch64_expand_prologue (void) + poly_int64 initial_adjust = frame.initial_adjust; + HOST_WIDE_INT callee_adjust = frame.callee_adjust; + poly_int64 final_adjust = frame.final_adjust; +- poly_int64 callee_offset = frame.callee_offset; + poly_int64 sve_callee_adjust = frame.sve_callee_adjust; + poly_int64 below_hard_fp_saved_regs_size + = frame.below_hard_fp_saved_regs_size; +@@ -10098,8 +10097,7 @@ aarch64_expand_prologue (void) + implicit. */ + if (!find_reg_note (insn, REG_CFA_ADJUST_CFA, NULL_RTX)) + { +- rtx src = plus_constant (Pmode, stack_pointer_rtx, +- callee_offset); ++ rtx src = plus_constant (Pmode, stack_pointer_rtx, chain_offset); + add_reg_note (insn, REG_CFA_ADJUST_CFA, + gen_rtx_SET (hard_frame_pointer_rtx, src)); + } +-- +2.34.1 + + +From b36a2a78040722dab6124366c5d6baf8eaf80aef Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:13 +0100 +Subject: [PATCH 03/19] aarch64: Explicitly handle frames with no saved + registers + +If a frame has no saved registers, it can be allocated in one go. +There is no need to treat the areas below and above the saved +registers as separate. + +And if we allocate the frame in one go, it should be allocated +as the initial_adjust rather than the final_adjust. This allows the +frame size to grow to guard_size - guard_used_by_caller before a stack +probe is needed. (A frame with no register saves is necessarily a +leaf frame.) + +This is a no-op as thing stand, since a leaf function will have +no outgoing arguments, and so all the frame will be above where +the saved registers normally go. + +gcc/ + * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly + allocate the frame in one go if there are no saved registers. +--- + gcc/config/aarch64/aarch64.cc | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 4f233c95140..37643041ffb 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8639,9 +8639,11 @@ aarch64_layout_frame (void) + + HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset; + HOST_WIDE_INT const_saved_regs_size; +- if (frame.frame_size.is_constant (&const_size) +- && const_size < max_push_offset +- && known_eq (frame.hard_fp_offset, const_size)) ++ if (known_eq (frame.saved_regs_size, 0)) ++ frame.initial_adjust = frame.frame_size; ++ else if (frame.frame_size.is_constant (&const_size) ++ && const_size < max_push_offset ++ && known_eq (frame.hard_fp_offset, const_size)) + { + /* Simple, small frame with no outgoing arguments: + +-- +2.34.1 + + +From ada2ab0093596be707f23a3466ac82cff59fcffe Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:13 +0100 +Subject: [PATCH 04/19] aarch64: Add bytes_below_saved_regs to frame info + +The frame layout code currently hard-codes the assumption that +the number of bytes below the saved registers is equal to the +size of the outgoing arguments. This patch abstracts that +value into a new field of aarch64_frame. + +gcc/ + * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New + field. + * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it, + and use it instead of crtl->outgoing_args_size. + (aarch64_get_separate_components): Use bytes_below_saved_regs instead + of outgoing_args_size. + (aarch64_process_components): Likewise. +--- + gcc/config/aarch64/aarch64.cc | 71 ++++++++++++++++++----------------- + gcc/config/aarch64/aarch64.h | 5 +++ + 2 files changed, 41 insertions(+), 35 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 37643041ffb..dacc2b0e4dd 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8478,6 +8478,8 @@ aarch64_layout_frame (void) + gcc_assert (crtl->is_leaf + || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); + ++ frame.bytes_below_saved_regs = crtl->outgoing_args_size; ++ + /* Now assign stack slots for the registers. Start with the predicate + registers, since predicate LDR and STR have a relatively small + offset range. These saves happen below the hard frame pointer. */ +@@ -8582,18 +8584,18 @@ aarch64_layout_frame (void) + + poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size; + +- poly_int64 above_outgoing_args ++ poly_int64 saved_regs_and_above + = aligned_upper_bound (varargs_and_saved_regs_size + + get_frame_size (), + STACK_BOUNDARY / BITS_PER_UNIT); + + frame.hard_fp_offset +- = above_outgoing_args - frame.below_hard_fp_saved_regs_size; ++ = saved_regs_and_above - frame.below_hard_fp_saved_regs_size; + + /* Both these values are already aligned. */ +- gcc_assert (multiple_p (crtl->outgoing_args_size, ++ gcc_assert (multiple_p (frame.bytes_below_saved_regs, + STACK_BOUNDARY / BITS_PER_UNIT)); +- frame.frame_size = above_outgoing_args + crtl->outgoing_args_size; ++ frame.frame_size = saved_regs_and_above + frame.bytes_below_saved_regs; + + frame.locals_offset = frame.saved_varargs_size; + +@@ -8637,7 +8639,7 @@ aarch64_layout_frame (void) + else if (frame.wb_pop_candidate1 != INVALID_REGNUM) + max_push_offset = 256; + +- HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset; ++ HOST_WIDE_INT const_size, const_below_saved_regs, const_fp_offset; + HOST_WIDE_INT const_saved_regs_size; + if (known_eq (frame.saved_regs_size, 0)) + frame.initial_adjust = frame.frame_size; +@@ -8645,31 +8647,31 @@ aarch64_layout_frame (void) + && const_size < max_push_offset + && known_eq (frame.hard_fp_offset, const_size)) + { +- /* Simple, small frame with no outgoing arguments: ++ /* Simple, small frame with no data below the saved registers. + + stp reg1, reg2, [sp, -frame_size]! + stp reg3, reg4, [sp, 16] */ + frame.callee_adjust = const_size; + } +- else if (crtl->outgoing_args_size.is_constant (&const_outgoing_args_size) ++ else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs) + && frame.saved_regs_size.is_constant (&const_saved_regs_size) +- && const_outgoing_args_size + const_saved_regs_size < 512 +- /* We could handle this case even with outgoing args, provided +- that the number of args left us with valid offsets for all +- predicate and vector save slots. It's such a rare case that +- it hardly seems worth the effort though. */ +- && (!saves_below_hard_fp_p || const_outgoing_args_size == 0) ++ && const_below_saved_regs + const_saved_regs_size < 512 ++ /* We could handle this case even with data below the saved ++ registers, provided that that data left us with valid offsets ++ for all predicate and vector save slots. It's such a rare ++ case that it hardly seems worth the effort though. */ ++ && (!saves_below_hard_fp_p || const_below_saved_regs == 0) + && !(cfun->calls_alloca + && frame.hard_fp_offset.is_constant (&const_fp_offset) + && const_fp_offset < max_push_offset)) + { +- /* Frame with small outgoing arguments: ++ /* Frame with small area below the saved registers: + + sub sp, sp, frame_size +- stp reg1, reg2, [sp, outgoing_args_size] +- stp reg3, reg4, [sp, outgoing_args_size + 16] */ ++ stp reg1, reg2, [sp, bytes_below_saved_regs] ++ stp reg3, reg4, [sp, bytes_below_saved_regs + 16] */ + frame.initial_adjust = frame.frame_size; +- frame.callee_offset = const_outgoing_args_size; ++ frame.callee_offset = const_below_saved_regs; + } + else if (saves_below_hard_fp_p + && known_eq (frame.saved_regs_size, +@@ -8679,30 +8681,29 @@ aarch64_layout_frame (void) + + sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size + save SVE registers relative to SP +- sub sp, sp, outgoing_args_size */ ++ sub sp, sp, bytes_below_saved_regs */ + frame.initial_adjust = (frame.hard_fp_offset + + frame.below_hard_fp_saved_regs_size); +- frame.final_adjust = crtl->outgoing_args_size; ++ frame.final_adjust = frame.bytes_below_saved_regs; + } + else if (frame.hard_fp_offset.is_constant (&const_fp_offset) + && const_fp_offset < max_push_offset) + { +- /* Frame with large outgoing arguments or SVE saves, but with +- a small local area: ++ /* Frame with large area below the saved registers, or with SVE saves, ++ but with a small area above: + + stp reg1, reg2, [sp, -hard_fp_offset]! + stp reg3, reg4, [sp, 16] + [sub sp, sp, below_hard_fp_saved_regs_size] + [save SVE registers relative to SP] +- sub sp, sp, outgoing_args_size */ ++ sub sp, sp, bytes_below_saved_regs */ + frame.callee_adjust = const_fp_offset; + frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; +- frame.final_adjust = crtl->outgoing_args_size; ++ frame.final_adjust = frame.bytes_below_saved_regs; + } + else + { +- /* Frame with large local area and outgoing arguments or SVE saves, +- using frame pointer: ++ /* General case: + + sub sp, sp, hard_fp_offset + stp x29, x30, [sp, 0] +@@ -8710,10 +8711,10 @@ aarch64_layout_frame (void) + stp reg3, reg4, [sp, 16] + [sub sp, sp, below_hard_fp_saved_regs_size] + [save SVE registers relative to SP] +- sub sp, sp, outgoing_args_size */ ++ sub sp, sp, bytes_below_saved_regs */ + frame.initial_adjust = frame.hard_fp_offset; + frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; +- frame.final_adjust = crtl->outgoing_args_size; ++ frame.final_adjust = frame.bytes_below_saved_regs; + } + + /* Make sure the individual adjustments add up to the full frame size. */ +@@ -9358,7 +9359,7 @@ aarch64_get_separate_components (void) + if (frame_pointer_needed) + offset -= frame.below_hard_fp_saved_regs_size; + else +- offset += crtl->outgoing_args_size; ++ offset += frame.bytes_below_saved_regs; + + /* Check that we can access the stack slot of the register with one + direct load with no adjustments needed. */ +@@ -9507,7 +9508,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) + if (frame_pointer_needed) + offset -= frame.below_hard_fp_saved_regs_size; + else +- offset += crtl->outgoing_args_size; ++ offset += frame.bytes_below_saved_regs; + + rtx addr = plus_constant (Pmode, ptr_reg, offset); + rtx mem = gen_frame_mem (mode, addr); +@@ -9561,7 +9562,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) + if (frame_pointer_needed) + offset2 -= frame.below_hard_fp_saved_regs_size; + else +- offset2 += crtl->outgoing_args_size; ++ offset2 += frame.bytes_below_saved_regs; + rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); + rtx mem2 = gen_frame_mem (mode, addr2); + rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2) +@@ -9635,10 +9636,10 @@ aarch64_stack_clash_protection_alloca_probe_range (void) + registers. If POLY_SIZE is not large enough to require a probe this function + will only adjust the stack. When allocating the stack space + FRAME_RELATED_P is then used to indicate if the allocation is frame related. +- FINAL_ADJUSTMENT_P indicates whether we are allocating the outgoing +- arguments. If we are then we ensure that any allocation larger than the ABI +- defined buffer needs a probe so that the invariant of having a 1KB buffer is +- maintained. ++ FINAL_ADJUSTMENT_P indicates whether we are allocating the area below ++ the saved registers. If we are then we ensure that any allocation ++ larger than the ABI defined buffer needs a probe so that the ++ invariant of having a 1KB buffer is maintained. + + We emit barriers after each stack adjustment to prevent optimizations from + breaking the invariant that we never drop the stack more than a page. This +@@ -9847,7 +9848,7 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, + /* Handle any residuals. Residuals of at least MIN_PROBE_THRESHOLD have to + be probed. This maintains the requirement that each page is probed at + least once. For initial probing we probe only if the allocation is +- more than GUARD_SIZE - buffer, and for the outgoing arguments we probe ++ more than GUARD_SIZE - buffer, and below the saved registers we probe + if the amount is larger than buffer. GUARD_SIZE - buffer + buffer == + GUARD_SIZE. This works that for any allocation that is large enough to + trigger a probe here, we'll have at least one, and if they're not large +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index 73b09e20508..0b6faa3ddf1 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -777,6 +777,11 @@ struct GTY (()) aarch64_frame + /* The size of the callee-save registers with a slot in REG_OFFSET. */ + poly_int64 saved_regs_size; + ++ /* The number of bytes between the bottom of the static frame (the bottom ++ of the outgoing arguments) and the bottom of the register save area. ++ This value is always a multiple of STACK_BOUNDARY. */ ++ poly_int64 bytes_below_saved_regs; ++ + /* The size of the callee-save registers with a slot in REG_OFFSET that + are saved below the hard frame pointer. */ + poly_int64 below_hard_fp_saved_regs_size; +-- +2.34.1 + + +From 82f6b3e1b596ef0f4e3ac3bb9c6e88fb4458f402 Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:14 +0100 +Subject: [PATCH 05/19] aarch64: Add bytes_below_hard_fp to frame info + +Following on from the previous bytes_below_saved_regs patch, this one +records the number of bytes that are below the hard frame pointer. +This eventually replaces below_hard_fp_saved_regs_size. + +If a frame pointer is not needed, the epilogue adds final_adjust +to the stack pointer before restoring registers: + + aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); + +Therefore, if the epilogue needs to restore the stack pointer from +the hard frame pointer, the directly corresponding offset is: + + -bytes_below_hard_fp + final_adjust + +i.e. go from the hard frame pointer to the bottom of the frame, +then add the same amount as if we were using the stack pointer +from the outset. + +gcc/ + * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New + field. + * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it. + (aarch64_expand_epilogue): Use it instead of + below_hard_fp_saved_regs_size. +--- + gcc/config/aarch64/aarch64.cc | 6 +++--- + gcc/config/aarch64/aarch64.h | 5 +++++ + 2 files changed, 8 insertions(+), 3 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index dacc2b0e4dd..a3f7aabcc59 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8530,6 +8530,7 @@ aarch64_layout_frame (void) + of the callee save area. */ + bool saves_below_hard_fp_p = maybe_ne (offset, 0); + frame.below_hard_fp_saved_regs_size = offset; ++ frame.bytes_below_hard_fp = offset + frame.bytes_below_saved_regs; + if (frame.emit_frame_chain) + { + /* FP and LR are placed in the linkage record. */ +@@ -10171,8 +10172,7 @@ aarch64_expand_epilogue (bool for_sibcall) + poly_int64 final_adjust = frame.final_adjust; + poly_int64 callee_offset = frame.callee_offset; + poly_int64 sve_callee_adjust = frame.sve_callee_adjust; +- poly_int64 below_hard_fp_saved_regs_size +- = frame.below_hard_fp_saved_regs_size; ++ poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp; + unsigned reg1 = frame.wb_pop_candidate1; + unsigned reg2 = frame.wb_pop_candidate2; + unsigned int last_gpr = (frame.is_scs_enabled +@@ -10230,7 +10230,7 @@ aarch64_expand_epilogue (bool for_sibcall) + is restored on the instruction doing the writeback. */ + aarch64_add_offset (Pmode, stack_pointer_rtx, + hard_frame_pointer_rtx, +- -callee_offset - below_hard_fp_saved_regs_size, ++ -bytes_below_hard_fp + final_adjust, + tmp1_rtx, tmp0_rtx, callee_adjust == 0); + else + /* The case where we need to re-use the register here is very rare, so +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index 0b6faa3ddf1..4263d29d29d 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -786,6 +786,11 @@ struct GTY (()) aarch64_frame + are saved below the hard frame pointer. */ + poly_int64 below_hard_fp_saved_regs_size; + ++ /* The number of bytes between the bottom of the static frame (the bottom ++ of the outgoing arguments) and the hard frame pointer. This value is ++ always a multiple of STACK_BOUNDARY. */ ++ poly_int64 bytes_below_hard_fp; ++ + /* Offset from the base of the frame (incomming SP) to the + top of the locals area. This value is always a multiple of + STACK_BOUNDARY. */ +-- +2.34.1 + + +From 86fa43e9fe4a8bf954f2919f07cbe3646d1d1df3 Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:14 +0100 +Subject: [PATCH 06/19] aarch64: Tweak aarch64_save/restore_callee_saves + +aarch64_save_callee_saves and aarch64_restore_callee_saves took +a parameter called start_offset that gives the offset of the +bottom of the saved register area from the current stack pointer. +However, it's more convenient for later patches if we use the +bottom of the entire frame as the reference point, rather than +the bottom of the saved registers. + +Doing that removes the need for the callee_offset field. +Other than that, this is not a win on its own. It only really +makes sense in combination with the follow-on patches. + +gcc/ + * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete. + * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove + callee_offset handling. + (aarch64_save_callee_saves): Replace the start_offset parameter + with a bytes_below_sp parameter. + (aarch64_restore_callee_saves): Likewise. + (aarch64_expand_prologue): Update accordingly. + (aarch64_expand_epilogue): Likewise. +--- + gcc/config/aarch64/aarch64.cc | 56 +++++++++++++++++------------------ + gcc/config/aarch64/aarch64.h | 4 --- + 2 files changed, 28 insertions(+), 32 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index a3f7aabcc59..46ae5cf7673 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8604,7 +8604,6 @@ aarch64_layout_frame (void) + frame.final_adjust = 0; + frame.callee_adjust = 0; + frame.sve_callee_adjust = 0; +- frame.callee_offset = 0; + + frame.wb_pop_candidate1 = frame.wb_push_candidate1; + frame.wb_pop_candidate2 = frame.wb_push_candidate2; +@@ -8672,7 +8671,6 @@ aarch64_layout_frame (void) + stp reg1, reg2, [sp, bytes_below_saved_regs] + stp reg3, reg4, [sp, bytes_below_saved_regs + 16] */ + frame.initial_adjust = frame.frame_size; +- frame.callee_offset = const_below_saved_regs; + } + else if (saves_below_hard_fp_p + && known_eq (frame.saved_regs_size, +@@ -9073,12 +9071,13 @@ aarch64_add_cfa_expression (rtx_insn *insn, rtx reg, + } + + /* Emit code to save the callee-saved registers from register number START +- to LIMIT to the stack at the location starting at offset START_OFFSET, +- skipping any write-back candidates if SKIP_WB is true. HARD_FP_VALID_P +- is true if the hard frame pointer has been set up. */ ++ to LIMIT to the stack. The stack pointer is currently BYTES_BELOW_SP ++ bytes above the bottom of the static frame. Skip any write-back ++ candidates if SKIP_WB is true. HARD_FP_VALID_P is true if the hard ++ frame pointer has been set up. */ + + static void +-aarch64_save_callee_saves (poly_int64 start_offset, ++aarch64_save_callee_saves (poly_int64 bytes_below_sp, + unsigned start, unsigned limit, bool skip_wb, + bool hard_fp_valid_p) + { +@@ -9106,7 +9105,9 @@ aarch64_save_callee_saves (poly_int64 start_offset, + + machine_mode mode = aarch64_reg_save_mode (regno); + reg = gen_rtx_REG (mode, regno); +- offset = start_offset + frame.reg_offset[regno]; ++ offset = (frame.reg_offset[regno] ++ + frame.bytes_below_saved_regs ++ - bytes_below_sp); + rtx base_rtx = stack_pointer_rtx; + poly_int64 sp_offset = offset; + +@@ -9117,9 +9118,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, + else if (GP_REGNUM_P (regno) + && (!offset.is_constant (&const_offset) || const_offset >= 512)) + { +- gcc_assert (known_eq (start_offset, 0)); +- poly_int64 fp_offset +- = frame.below_hard_fp_saved_regs_size; ++ poly_int64 fp_offset = frame.bytes_below_hard_fp - bytes_below_sp; + if (hard_fp_valid_p) + base_rtx = hard_frame_pointer_rtx; + else +@@ -9183,12 +9182,13 @@ aarch64_save_callee_saves (poly_int64 start_offset, + } + + /* Emit code to restore the callee registers from register number START +- up to and including LIMIT. Restore from the stack offset START_OFFSET, +- skipping any write-back candidates if SKIP_WB is true. Write the +- appropriate REG_CFA_RESTORE notes into CFI_OPS. */ ++ up to and including LIMIT. The stack pointer is currently BYTES_BELOW_SP ++ bytes above the bottom of the static frame. Skip any write-back ++ candidates if SKIP_WB is true. Write the appropriate REG_CFA_RESTORE ++ notes into CFI_OPS. */ + + static void +-aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, ++aarch64_restore_callee_saves (poly_int64 bytes_below_sp, unsigned start, + unsigned limit, bool skip_wb, rtx *cfi_ops) + { + aarch64_frame &frame = cfun->machine->frame; +@@ -9214,7 +9214,9 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, + + machine_mode mode = aarch64_reg_save_mode (regno); + reg = gen_rtx_REG (mode, regno); +- offset = start_offset + frame.reg_offset[regno]; ++ offset = (frame.reg_offset[regno] ++ + frame.bytes_below_saved_regs ++ - bytes_below_sp); + rtx base_rtx = stack_pointer_rtx; + if (mode == VNx2DImode && BYTES_BIG_ENDIAN) + aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, +@@ -9990,8 +9992,6 @@ aarch64_expand_prologue (void) + HOST_WIDE_INT callee_adjust = frame.callee_adjust; + poly_int64 final_adjust = frame.final_adjust; + poly_int64 sve_callee_adjust = frame.sve_callee_adjust; +- poly_int64 below_hard_fp_saved_regs_size +- = frame.below_hard_fp_saved_regs_size; + unsigned reg1 = frame.wb_push_candidate1; + unsigned reg2 = frame.wb_push_candidate2; + bool emit_frame_chain = frame.emit_frame_chain; +@@ -10067,8 +10067,8 @@ aarch64_expand_prologue (void) + - frame.hard_fp_offset); + gcc_assert (known_ge (chain_offset, 0)); + +- /* The offset of the bottom of the save area from the current SP. */ +- poly_int64 saved_regs_offset = chain_offset - below_hard_fp_saved_regs_size; ++ /* The offset of the current SP from the bottom of the static frame. */ ++ poly_int64 bytes_below_sp = frame_size - initial_adjust - callee_adjust; + + if (emit_frame_chain) + { +@@ -10076,7 +10076,7 @@ aarch64_expand_prologue (void) + { + reg1 = R29_REGNUM; + reg2 = R30_REGNUM; +- aarch64_save_callee_saves (saved_regs_offset, reg1, reg2, ++ aarch64_save_callee_saves (bytes_below_sp, reg1, reg2, + false, false); + } + else +@@ -10116,7 +10116,7 @@ aarch64_expand_prologue (void) + emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); + } + +- aarch64_save_callee_saves (saved_regs_offset, R0_REGNUM, R30_REGNUM, ++ aarch64_save_callee_saves (bytes_below_sp, R0_REGNUM, R30_REGNUM, + callee_adjust != 0 || emit_frame_chain, + emit_frame_chain); + if (maybe_ne (sve_callee_adjust, 0)) +@@ -10126,16 +10126,17 @@ aarch64_expand_prologue (void) + aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, + sve_callee_adjust, + !frame_pointer_needed, false); +- saved_regs_offset += sve_callee_adjust; ++ bytes_below_sp -= sve_callee_adjust; + } +- aarch64_save_callee_saves (saved_regs_offset, P0_REGNUM, P15_REGNUM, ++ aarch64_save_callee_saves (bytes_below_sp, P0_REGNUM, P15_REGNUM, + false, emit_frame_chain); +- aarch64_save_callee_saves (saved_regs_offset, V0_REGNUM, V31_REGNUM, ++ aarch64_save_callee_saves (bytes_below_sp, V0_REGNUM, V31_REGNUM, + callee_adjust != 0 || emit_frame_chain, + emit_frame_chain); + + /* We may need to probe the final adjustment if it is larger than the guard + that is assumed by the called. */ ++ gcc_assert (known_eq (bytes_below_sp, final_adjust)); + aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust, + !frame_pointer_needed, true); + } +@@ -10170,7 +10171,6 @@ aarch64_expand_epilogue (bool for_sibcall) + poly_int64 initial_adjust = frame.initial_adjust; + HOST_WIDE_INT callee_adjust = frame.callee_adjust; + poly_int64 final_adjust = frame.final_adjust; +- poly_int64 callee_offset = frame.callee_offset; + poly_int64 sve_callee_adjust = frame.sve_callee_adjust; + poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp; + unsigned reg1 = frame.wb_pop_candidate1; +@@ -10240,9 +10240,9 @@ aarch64_expand_epilogue (bool for_sibcall) + + /* Restore the vector registers before the predicate registers, + so that we can use P4 as a temporary for big-endian SVE frames. */ +- aarch64_restore_callee_saves (callee_offset, V0_REGNUM, V31_REGNUM, ++ aarch64_restore_callee_saves (final_adjust, V0_REGNUM, V31_REGNUM, + callee_adjust != 0, &cfi_ops); +- aarch64_restore_callee_saves (callee_offset, P0_REGNUM, P15_REGNUM, ++ aarch64_restore_callee_saves (final_adjust, P0_REGNUM, P15_REGNUM, + false, &cfi_ops); + if (maybe_ne (sve_callee_adjust, 0)) + aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); +@@ -10250,7 +10250,7 @@ aarch64_expand_epilogue (bool for_sibcall) + /* When shadow call stack is enabled, the scs_pop in the epilogue will + restore x30, we don't need to restore x30 again in the traditional + way. */ +- aarch64_restore_callee_saves (callee_offset - sve_callee_adjust, ++ aarch64_restore_callee_saves (final_adjust + sve_callee_adjust, + R0_REGNUM, last_gpr, + callee_adjust != 0, &cfi_ops); + +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index 4263d29d29d..fd820b1be4e 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -813,10 +813,6 @@ struct GTY (()) aarch64_frame + It is zero when no push is used. */ + HOST_WIDE_INT callee_adjust; + +- /* The offset from SP to the callee-save registers after initial_adjust. +- It may be non-zero if no push is used (ie. callee_adjust == 0). */ +- poly_int64 callee_offset; +- + /* The size of the stack adjustment before saving or after restoring + SVE registers. */ + poly_int64 sve_callee_adjust; +-- +2.34.1 + + +From 8ae9181426f2700c2e5a2909487fa630e6fa406b Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:15 +0100 +Subject: [PATCH 07/19] aarch64: Only calculate chain_offset if there is a + chain + +After previous patches, it is no longer necessary to calculate +a chain_offset in cases where there is no chain record. + +gcc/ + * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the + calculation of chain_offset into the emit_frame_chain block. +--- + gcc/config/aarch64/aarch64.cc | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 46ae5cf7673..0e9b9717c08 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -10062,16 +10062,16 @@ aarch64_expand_prologue (void) + if (callee_adjust != 0) + aarch64_push_regs (reg1, reg2, callee_adjust); + +- /* The offset of the frame chain record (if any) from the current SP. */ +- poly_int64 chain_offset = (initial_adjust + callee_adjust +- - frame.hard_fp_offset); +- gcc_assert (known_ge (chain_offset, 0)); +- + /* The offset of the current SP from the bottom of the static frame. */ + poly_int64 bytes_below_sp = frame_size - initial_adjust - callee_adjust; + + if (emit_frame_chain) + { ++ /* The offset of the frame chain record (if any) from the current SP. */ ++ poly_int64 chain_offset = (initial_adjust + callee_adjust ++ - frame.hard_fp_offset); ++ gcc_assert (known_ge (chain_offset, 0)); ++ + if (callee_adjust == 0) + { + reg1 = R29_REGNUM; +-- +2.34.1 + + +From 375794feb614cee1f41b710b9cc1b6f25da6c1cb Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:15 +0100 +Subject: [PATCH 08/19] aarch64: Rename locals_offset to bytes_above_locals +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +locals_offset was described as: + + /* Offset from the base of the frame (incomming SP) to the + top of the locals area. This value is always a multiple of + STACK_BOUNDARY. */ + +This is implicitly an “upside down” view of the frame: the incoming +SP is at offset 0, and anything N bytes below the incoming SP is at +offset N (rather than -N). + +However, reg_offset instead uses a “right way up” view; that is, +it views offsets in address terms. Something above X is at a +positive offset from X and something below X is at a negative +offset from X. + +Also, even on FRAME_GROWS_DOWNWARD targets like AArch64, +target-independent code views offsets in address terms too: +locals are allocated at negative offsets to virtual_stack_vars. + +It seems confusing to have *_offset fields of the same structure +using different polarities like this. This patch tries to avoid +that by renaming locals_offset to bytes_above_locals. + +gcc/ + * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to... + (aarch64_frame::bytes_above_locals): ...this. + * config/aarch64/aarch64.cc (aarch64_layout_frame) + (aarch64_initial_elimination_offset): Update accordingly. +--- + gcc/config/aarch64/aarch64.cc | 6 +++--- + gcc/config/aarch64/aarch64.h | 6 +++--- + 2 files changed, 6 insertions(+), 6 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 0e9b9717c08..0a22f91520e 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8598,7 +8598,7 @@ aarch64_layout_frame (void) + STACK_BOUNDARY / BITS_PER_UNIT)); + frame.frame_size = saved_regs_and_above + frame.bytes_below_saved_regs; + +- frame.locals_offset = frame.saved_varargs_size; ++ frame.bytes_above_locals = frame.saved_varargs_size; + + frame.initial_adjust = 0; + frame.final_adjust = 0; +@@ -12754,13 +12754,13 @@ aarch64_initial_elimination_offset (unsigned from, unsigned to) + return frame.hard_fp_offset; + + if (from == FRAME_POINTER_REGNUM) +- return frame.hard_fp_offset - frame.locals_offset; ++ return frame.hard_fp_offset - frame.bytes_above_locals; + } + + if (to == STACK_POINTER_REGNUM) + { + if (from == FRAME_POINTER_REGNUM) +- return frame.frame_size - frame.locals_offset; ++ return frame.frame_size - frame.bytes_above_locals; + } + + return frame.frame_size; +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index fd820b1be4e..7ae12d13e2b 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -791,10 +791,10 @@ struct GTY (()) aarch64_frame + always a multiple of STACK_BOUNDARY. */ + poly_int64 bytes_below_hard_fp; + +- /* Offset from the base of the frame (incomming SP) to the +- top of the locals area. This value is always a multiple of ++ /* The number of bytes between the top of the locals area and the top ++ of the frame (the incomming SP). This value is always a multiple of + STACK_BOUNDARY. */ +- poly_int64 locals_offset; ++ poly_int64 bytes_above_locals; + + /* Offset from the base of the frame (incomming SP) to the + hard_frame_pointer. This value is always a multiple of +-- +2.34.1 + + +From 1a9ea1c45c75615ffbfabe652b3598a1d7be2168 Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:16 +0100 +Subject: [PATCH 09/19] aarch64: Rename hard_fp_offset to bytes_above_hard_fp +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Similarly to the previous locals_offset patch, hard_fp_offset +was described as: + + /* Offset from the base of the frame (incomming SP) to the + hard_frame_pointer. This value is always a multiple of + STACK_BOUNDARY. */ + poly_int64 hard_fp_offset; + +which again took an “upside-down” view: higher offsets meant lower +addresses. This patch renames the field to bytes_above_hard_fp instead. + +gcc/ + * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename + to... + (aarch64_frame::bytes_above_hard_fp): ...this. + * config/aarch64/aarch64.cc (aarch64_layout_frame) + (aarch64_expand_prologue): Update accordingly. + (aarch64_initial_elimination_offset): Likewise. +--- + gcc/config/aarch64/aarch64.cc | 26 +++++++++++++------------- + gcc/config/aarch64/aarch64.h | 6 +++--- + 2 files changed, 16 insertions(+), 16 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 0a22f91520e..95499ae49ba 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8590,7 +8590,7 @@ aarch64_layout_frame (void) + + get_frame_size (), + STACK_BOUNDARY / BITS_PER_UNIT); + +- frame.hard_fp_offset ++ frame.bytes_above_hard_fp + = saved_regs_and_above - frame.below_hard_fp_saved_regs_size; + + /* Both these values are already aligned. */ +@@ -8639,13 +8639,13 @@ aarch64_layout_frame (void) + else if (frame.wb_pop_candidate1 != INVALID_REGNUM) + max_push_offset = 256; + +- HOST_WIDE_INT const_size, const_below_saved_regs, const_fp_offset; ++ HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; + HOST_WIDE_INT const_saved_regs_size; + if (known_eq (frame.saved_regs_size, 0)) + frame.initial_adjust = frame.frame_size; + else if (frame.frame_size.is_constant (&const_size) + && const_size < max_push_offset +- && known_eq (frame.hard_fp_offset, const_size)) ++ && known_eq (frame.bytes_above_hard_fp, const_size)) + { + /* Simple, small frame with no data below the saved registers. + +@@ -8662,8 +8662,8 @@ aarch64_layout_frame (void) + case that it hardly seems worth the effort though. */ + && (!saves_below_hard_fp_p || const_below_saved_regs == 0) + && !(cfun->calls_alloca +- && frame.hard_fp_offset.is_constant (&const_fp_offset) +- && const_fp_offset < max_push_offset)) ++ && frame.bytes_above_hard_fp.is_constant (&const_above_fp) ++ && const_above_fp < max_push_offset)) + { + /* Frame with small area below the saved registers: + +@@ -8681,12 +8681,12 @@ aarch64_layout_frame (void) + sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size + save SVE registers relative to SP + sub sp, sp, bytes_below_saved_regs */ +- frame.initial_adjust = (frame.hard_fp_offset ++ frame.initial_adjust = (frame.bytes_above_hard_fp + + frame.below_hard_fp_saved_regs_size); + frame.final_adjust = frame.bytes_below_saved_regs; + } +- else if (frame.hard_fp_offset.is_constant (&const_fp_offset) +- && const_fp_offset < max_push_offset) ++ else if (frame.bytes_above_hard_fp.is_constant (&const_above_fp) ++ && const_above_fp < max_push_offset) + { + /* Frame with large area below the saved registers, or with SVE saves, + but with a small area above: +@@ -8696,7 +8696,7 @@ aarch64_layout_frame (void) + [sub sp, sp, below_hard_fp_saved_regs_size] + [save SVE registers relative to SP] + sub sp, sp, bytes_below_saved_regs */ +- frame.callee_adjust = const_fp_offset; ++ frame.callee_adjust = const_above_fp; + frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; + frame.final_adjust = frame.bytes_below_saved_regs; + } +@@ -8711,7 +8711,7 @@ aarch64_layout_frame (void) + [sub sp, sp, below_hard_fp_saved_regs_size] + [save SVE registers relative to SP] + sub sp, sp, bytes_below_saved_regs */ +- frame.initial_adjust = frame.hard_fp_offset; ++ frame.initial_adjust = frame.bytes_above_hard_fp; + frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; + frame.final_adjust = frame.bytes_below_saved_regs; + } +@@ -10069,7 +10069,7 @@ aarch64_expand_prologue (void) + { + /* The offset of the frame chain record (if any) from the current SP. */ + poly_int64 chain_offset = (initial_adjust + callee_adjust +- - frame.hard_fp_offset); ++ - frame.bytes_above_hard_fp); + gcc_assert (known_ge (chain_offset, 0)); + + if (callee_adjust == 0) +@@ -12751,10 +12751,10 @@ aarch64_initial_elimination_offset (unsigned from, unsigned to) + if (to == HARD_FRAME_POINTER_REGNUM) + { + if (from == ARG_POINTER_REGNUM) +- return frame.hard_fp_offset; ++ return frame.bytes_above_hard_fp; + + if (from == FRAME_POINTER_REGNUM) +- return frame.hard_fp_offset - frame.bytes_above_locals; ++ return frame.bytes_above_hard_fp - frame.bytes_above_locals; + } + + if (to == STACK_POINTER_REGNUM) +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index 7ae12d13e2b..3808f49e9ca 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -796,10 +796,10 @@ struct GTY (()) aarch64_frame + STACK_BOUNDARY. */ + poly_int64 bytes_above_locals; + +- /* Offset from the base of the frame (incomming SP) to the +- hard_frame_pointer. This value is always a multiple of ++ /* The number of bytes between the hard_frame_pointer and the top of ++ the frame (the incomming SP). This value is always a multiple of + STACK_BOUNDARY. */ +- poly_int64 hard_fp_offset; ++ poly_int64 bytes_above_hard_fp; + + /* The size of the frame. This value is the offset from base of the + frame (incomming SP) to the stack_pointer. This value is always +-- +2.34.1 + + +From d202ce1ecf60a36a3e1009917dd76109248ce9be Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:16 +0100 +Subject: [PATCH 10/19] aarch64: Tweak frame_size comment +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This patch fixes another case in which a value was described with +an “upside-down” view. + +gcc/ + * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment. +--- + gcc/config/aarch64/aarch64.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index 3808f49e9ca..108a5731b0d 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -801,8 +801,8 @@ struct GTY (()) aarch64_frame + STACK_BOUNDARY. */ + poly_int64 bytes_above_hard_fp; + +- /* The size of the frame. This value is the offset from base of the +- frame (incomming SP) to the stack_pointer. This value is always ++ /* The size of the frame, i.e. the number of bytes between the bottom ++ of the outgoing arguments and the incoming SP. This value is always + a multiple of STACK_BOUNDARY. */ + poly_int64 frame_size; + +-- +2.34.1 + + +From f2b585375205b0a1802d79c682ba33766ecd1f0f Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:17 +0100 +Subject: [PATCH 11/19] aarch64: Measure reg_offset from the bottom of the + frame + +reg_offset was measured from the bottom of the saved register area. +This made perfect sense with the original layout, since the bottom +of the saved register area was also the hard frame pointer address. +It became slightly less obvious with SVE, since we save SVE +registers below the hard frame pointer, but it still made sense. + +However, if we want to allow different frame layouts, it's more +convenient and obvious to measure reg_offset from the bottom of +the frame. After previous patches, it's also a slight simplification +in its own right. + +gcc/ + * config/aarch64/aarch64.h (aarch64_frame): Add comment above + reg_offset. + * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets + from the bottom of the frame, rather than the bottom of the saved + register area. Measure reg_offset from the bottom of the frame + rather than the bottom of the saved register area. + (aarch64_save_callee_saves): Update accordingly. + (aarch64_restore_callee_saves): Likewise. + (aarch64_get_separate_components): Likewise. + (aarch64_process_components): Likewise. +--- + gcc/config/aarch64/aarch64.cc | 53 ++++++++++++++++------------------- + gcc/config/aarch64/aarch64.h | 3 ++ + 2 files changed, 27 insertions(+), 29 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 95499ae49ba..af99807ef8a 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8400,7 +8400,6 @@ aarch64_needs_frame_chain (void) + static void + aarch64_layout_frame (void) + { +- poly_int64 offset = 0; + int regno, last_fp_reg = INVALID_REGNUM; + machine_mode vector_save_mode = aarch64_reg_save_mode (V8_REGNUM); + poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode); +@@ -8478,7 +8477,9 @@ aarch64_layout_frame (void) + gcc_assert (crtl->is_leaf + || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); + +- frame.bytes_below_saved_regs = crtl->outgoing_args_size; ++ poly_int64 offset = crtl->outgoing_args_size; ++ gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); ++ frame.bytes_below_saved_regs = offset; + + /* Now assign stack slots for the registers. Start with the predicate + registers, since predicate LDR and STR have a relatively small +@@ -8490,7 +8491,8 @@ aarch64_layout_frame (void) + offset += BYTES_PER_SVE_PRED; + } + +- if (maybe_ne (offset, 0)) ++ poly_int64 saved_prs_size = offset - frame.bytes_below_saved_regs; ++ if (maybe_ne (saved_prs_size, 0)) + { + /* If we have any vector registers to save above the predicate registers, + the offset of the vector register save slots need to be a multiple +@@ -8508,10 +8510,10 @@ aarch64_layout_frame (void) + offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); + else + { +- if (known_le (offset, vector_save_size)) +- offset = vector_save_size; +- else if (known_le (offset, vector_save_size * 2)) +- offset = vector_save_size * 2; ++ if (known_le (saved_prs_size, vector_save_size)) ++ offset = frame.bytes_below_saved_regs + vector_save_size; ++ else if (known_le (saved_prs_size, vector_save_size * 2)) ++ offset = frame.bytes_below_saved_regs + vector_save_size * 2; + else + gcc_unreachable (); + } +@@ -8528,9 +8530,10 @@ aarch64_layout_frame (void) + + /* OFFSET is now the offset of the hard frame pointer from the bottom + of the callee save area. */ +- bool saves_below_hard_fp_p = maybe_ne (offset, 0); +- frame.below_hard_fp_saved_regs_size = offset; +- frame.bytes_below_hard_fp = offset + frame.bytes_below_saved_regs; ++ frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; ++ bool saves_below_hard_fp_p ++ = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); ++ frame.bytes_below_hard_fp = offset; + if (frame.emit_frame_chain) + { + /* FP and LR are placed in the linkage record. */ +@@ -8581,9 +8584,10 @@ aarch64_layout_frame (void) + + offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); + +- frame.saved_regs_size = offset; ++ frame.saved_regs_size = offset - frame.bytes_below_saved_regs; + +- poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size; ++ poly_int64 varargs_and_saved_regs_size ++ = frame.saved_regs_size + frame.saved_varargs_size; + + poly_int64 saved_regs_and_above + = aligned_upper_bound (varargs_and_saved_regs_size +@@ -9105,9 +9109,7 @@ aarch64_save_callee_saves (poly_int64 bytes_below_sp, + + machine_mode mode = aarch64_reg_save_mode (regno); + reg = gen_rtx_REG (mode, regno); +- offset = (frame.reg_offset[regno] +- + frame.bytes_below_saved_regs +- - bytes_below_sp); ++ offset = frame.reg_offset[regno] - bytes_below_sp; + rtx base_rtx = stack_pointer_rtx; + poly_int64 sp_offset = offset; + +@@ -9214,9 +9216,7 @@ aarch64_restore_callee_saves (poly_int64 bytes_below_sp, unsigned start, + + machine_mode mode = aarch64_reg_save_mode (regno); + reg = gen_rtx_REG (mode, regno); +- offset = (frame.reg_offset[regno] +- + frame.bytes_below_saved_regs +- - bytes_below_sp); ++ offset = frame.reg_offset[regno] - bytes_below_sp; + rtx base_rtx = stack_pointer_rtx; + if (mode == VNx2DImode && BYTES_BIG_ENDIAN) + aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, +@@ -9355,14 +9355,12 @@ aarch64_get_separate_components (void) + it as a stack probe for -fstack-clash-protection. */ + if (flag_stack_clash_protection + && maybe_ne (frame.below_hard_fp_saved_regs_size, 0) +- && known_eq (offset, 0)) ++ && known_eq (offset, frame.bytes_below_saved_regs)) + continue; + + /* Get the offset relative to the register we'll use. */ + if (frame_pointer_needed) +- offset -= frame.below_hard_fp_saved_regs_size; +- else +- offset += frame.bytes_below_saved_regs; ++ offset -= frame.bytes_below_hard_fp; + + /* Check that we can access the stack slot of the register with one + direct load with no adjustments needed. */ +@@ -9509,9 +9507,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) + rtx reg = gen_rtx_REG (mode, regno); + poly_int64 offset = frame.reg_offset[regno]; + if (frame_pointer_needed) +- offset -= frame.below_hard_fp_saved_regs_size; +- else +- offset += frame.bytes_below_saved_regs; ++ offset -= frame.bytes_below_hard_fp; + + rtx addr = plus_constant (Pmode, ptr_reg, offset); + rtx mem = gen_frame_mem (mode, addr); +@@ -9563,9 +9559,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) + /* REGNO2 can be saved/restored in a pair with REGNO. */ + rtx reg2 = gen_rtx_REG (mode, regno2); + if (frame_pointer_needed) +- offset2 -= frame.below_hard_fp_saved_regs_size; +- else +- offset2 += frame.bytes_below_saved_regs; ++ offset2 -= frame.bytes_below_hard_fp; + rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); + rtx mem2 = gen_frame_mem (mode, addr2); + rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2) +@@ -9681,7 +9675,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, + if (final_adjustment_p + && known_eq (frame.below_hard_fp_saved_regs_size, 0)) + { +- poly_int64 lr_offset = frame.reg_offset[LR_REGNUM]; ++ poly_int64 lr_offset = (frame.reg_offset[LR_REGNUM] ++ - frame.bytes_below_saved_regs); + if (known_ge (lr_offset, 0)) + min_probe_threshold -= lr_offset.to_constant (); + else +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index 108a5731b0d..c8becb098c8 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -766,6 +766,9 @@ extern enum aarch64_processor aarch64_tune; + #ifdef HAVE_POLY_INT_H + struct GTY (()) aarch64_frame + { ++ /* The offset from the bottom of the static frame (the bottom of the ++ outgoing arguments) of each register save slot, or -2 if no save is ++ needed. */ + poly_int64 reg_offset[LAST_SAVED_REGNUM + 1]; + + /* The number of extra stack bytes taken up by register varargs. +-- +2.34.1 + + +From 79faabda181d0d9fd29a3cf5726ba65bdee945b5 Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:17 +0100 +Subject: [PATCH 12/19] aarch64: Simplify top of frame allocation + +After previous patches, it no longer really makes sense to allocate +the top of the frame in terms of varargs_and_saved_regs_size and +saved_regs_and_above. + +gcc/ + * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify + the allocation of the top of the frame. +--- + gcc/config/aarch64/aarch64.cc | 23 ++++++++--------------- + 1 file changed, 8 insertions(+), 15 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index af99807ef8a..31b00094c2a 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8586,23 +8586,16 @@ aarch64_layout_frame (void) + + frame.saved_regs_size = offset - frame.bytes_below_saved_regs; + +- poly_int64 varargs_and_saved_regs_size +- = frame.saved_regs_size + frame.saved_varargs_size; +- +- poly_int64 saved_regs_and_above +- = aligned_upper_bound (varargs_and_saved_regs_size +- + get_frame_size (), +- STACK_BOUNDARY / BITS_PER_UNIT); +- +- frame.bytes_above_hard_fp +- = saved_regs_and_above - frame.below_hard_fp_saved_regs_size; ++ offset += get_frame_size (); ++ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); ++ auto top_of_locals = offset; + +- /* Both these values are already aligned. */ +- gcc_assert (multiple_p (frame.bytes_below_saved_regs, +- STACK_BOUNDARY / BITS_PER_UNIT)); +- frame.frame_size = saved_regs_and_above + frame.bytes_below_saved_regs; ++ offset += frame.saved_varargs_size; ++ gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); ++ frame.frame_size = offset; + +- frame.bytes_above_locals = frame.saved_varargs_size; ++ frame.bytes_above_hard_fp = frame.frame_size - frame.bytes_below_hard_fp; ++ frame.bytes_above_locals = frame.frame_size - top_of_locals; + + frame.initial_adjust = 0; + frame.final_adjust = 0; +-- +2.34.1 + + +From 4e62049e403b141e6f916176160dac8cbd65fe47 Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:18 +0100 +Subject: [PATCH 13/19] aarch64: Minor initial adjustment tweak + +This patch just changes a calculation of initial_adjust +to one that makes it slightly more obvious that the total +adjustment is frame.frame_size. + +gcc/ + * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak + calculation of initial_adjust for frames in which all saves + are SVE saves. +--- + gcc/config/aarch64/aarch64.cc | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 31b00094c2a..1aa79da0673 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8675,11 +8675,10 @@ aarch64_layout_frame (void) + { + /* Frame in which all saves are SVE saves: + +- sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size ++ sub sp, sp, frame_size - bytes_below_saved_regs + save SVE registers relative to SP + sub sp, sp, bytes_below_saved_regs */ +- frame.initial_adjust = (frame.bytes_above_hard_fp +- + frame.below_hard_fp_saved_regs_size); ++ frame.initial_adjust = frame.frame_size - frame.bytes_below_saved_regs; + frame.final_adjust = frame.bytes_below_saved_regs; + } + else if (frame.bytes_above_hard_fp.is_constant (&const_above_fp) +-- +2.34.1 + + +From aaa1a0a5912d9e5d571e5f1c6f09ceac99544ab5 Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:18 +0100 +Subject: [PATCH 14/19] aarch64: Tweak stack clash boundary condition + +The AArch64 ABI says that, when stack clash protection is used, +there can be a maximum of 1KiB of unprobed space at sp on entry +to a function. Therefore, we need to probe when allocating +>= guard_size - 1KiB of data (>= rather than >). This is what +GCC does. + +If an allocation is exactly guard_size bytes, it is enough to allocate +those bytes and probe once at offset 1024. It isn't possible to use a +single probe at any other offset: higher would conmplicate later code, +by leaving more unprobed space than usual, while lower would risk +leaving an entire page unprobed. For simplicity, the code probes all +allocations at offset 1024. + +Some register saves also act as probes. If we need to allocate +more space below the last such register save probe, we need to +probe the allocation if it is > 1KiB. Again, this allocation is +then sometimes (but not always) probed at offset 1024. This sort of +allocation is currently only used for outgoing arguments, which are +rarely this big. + +However, the code also probed if this final outgoing-arguments +allocation was == 1KiB, rather than just > 1KiB. This isn't +necessary, since the register save then probes at offset 1024 +as required. Continuing to probe allocations of exactly 1KiB +would complicate later patches. + +gcc/ + * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space): + Don't probe final allocations that are exactly 1KiB in size (after + unprobed space above the final allocation has been deducted). + +gcc/testsuite/ + * gcc.target/aarch64/stack-check-prologue-17.c: New test. +--- + gcc/config/aarch64/aarch64.cc | 4 +- + .../aarch64/stack-check-prologue-17.c | 55 +++++++++++++++++++ + 2 files changed, 58 insertions(+), 1 deletion(-) + create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 1aa79da0673..5cad847977a 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -9648,9 +9648,11 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, + HOST_WIDE_INT guard_size + = 1 << param_stack_clash_protection_guard_size; + HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD; ++ HOST_WIDE_INT byte_sp_alignment = STACK_BOUNDARY / BITS_PER_UNIT; ++ gcc_assert (multiple_p (poly_size, byte_sp_alignment)); + HOST_WIDE_INT min_probe_threshold + = (final_adjustment_p +- ? guard_used_by_caller ++ ? guard_used_by_caller + byte_sp_alignment + : guard_size - guard_used_by_caller); + /* When doing the final adjustment for the outgoing arguments, take into + account any unprobed space there is above the current SP. There are +diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c +new file mode 100644 +index 00000000000..0d8a25d73a2 +--- /dev/null ++++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c +@@ -0,0 +1,55 @@ ++/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */ ++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++void f(int, ...); ++void g(); ++ ++/* ++** test1: ++** ... ++** str x30, \[sp\] ++** sub sp, sp, #1024 ++** cbnz w0, .* ++** bl g ++** ... ++*/ ++int test1(int z) { ++ __uint128_t x = 0; ++ int y[0x400]; ++ if (z) ++ { ++ f(0, 0, 0, 0, 0, 0, 0, &y, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); ++ } ++ g(); ++ return 1; ++} ++ ++/* ++** test2: ++** ... ++** str x30, \[sp\] ++** sub sp, sp, #1040 ++** str xzr, \[sp\] ++** cbnz w0, .* ++** bl g ++** ... ++*/ ++int test2(int z) { ++ __uint128_t x = 0; ++ int y[0x400]; ++ if (z) ++ { ++ f(0, 0, 0, 0, 0, 0, 0, &y, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x); ++ } ++ g(); ++ return 1; ++} +-- +2.34.1 + + +From 8433953434a7b58c0923140d39eb3c5988c1d097 Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:19 +0100 +Subject: [PATCH 15/19] aarch64: Put LR save probe in first 16 bytes + +-fstack-clash-protection uses the save of LR as a probe for the next +allocation. The next allocation could be: + +* another part of the static frame, e.g. when allocating SVE save slots + or outgoing arguments + +* an alloca in the same function + +* an allocation made by a callee function + +However, when -fomit-frame-pointer is used, the LR save slot is placed +above the other GPR save slots. It could therefore be up to 80 bytes +above the base of the GPR save area (which is also the hard fp address). + +aarch64_allocate_and_probe_stack_space took this into account when +deciding how much subsequent space could be allocated without needing +a probe. However, it interacted badly with: + + /* If doing a small final adjustment, we always probe at offset 0. + This is done to avoid issues when LR is not at position 0 or when + the final adjustment is smaller than the probing offset. */ + else if (final_adjustment_p && rounded_size == 0) + residual_probe_offset = 0; + +which forces any allocation that is smaller than the guard page size +to be probed at offset 0 rather than the usual offset 1024. It was +therefore possible to construct cases in which we had: + +* a probe using LR at SP + 80 bytes (or some other value >= 16) +* an allocation of the guard page size - 16 bytes +* a probe at SP + 0 + +which allocates guard page size + 64 consecutive unprobed bytes. + +This patch requires the LR probe to be in the first 16 bytes of the +save area when stack clash protection is active. Doing it +unconditionally would cause code-quality regressions. + +Putting LR before other registers prevents push/pop allocation +when shadow call stacks are enabled, since LR is restored +separately from the other callee-saved registers. + +The new comment doesn't say that the probe register is required +to be LR, since a later patch removes that restriction. + +gcc/ + * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that + the LR save slot is in the first 16 bytes of the register save area. + Only form STP/LDP push/pop candidates if both registers are valid. + (aarch64_allocate_and_probe_stack_space): Remove workaround for + when LR was not in the first 16 bytes. + +gcc/testsuite/ + * gcc.target/aarch64/stack-check-prologue-18.c: New test. + * gcc.target/aarch64/stack-check-prologue-19.c: Likewise. + * gcc.target/aarch64/stack-check-prologue-20.c: Likewise. +--- + gcc/config/aarch64/aarch64.cc | 72 ++++++------- + .../aarch64/stack-check-prologue-18.c | 100 ++++++++++++++++++ + .../aarch64/stack-check-prologue-19.c | 100 ++++++++++++++++++ + .../aarch64/stack-check-prologue-20.c | 3 + + 4 files changed, 233 insertions(+), 42 deletions(-) + create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c + create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c + create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 5cad847977a..a765f92329d 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8534,26 +8534,34 @@ aarch64_layout_frame (void) + bool saves_below_hard_fp_p + = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); + frame.bytes_below_hard_fp = offset; ++ ++ auto allocate_gpr_slot = [&](unsigned int regno) ++ { ++ frame.reg_offset[regno] = offset; ++ if (frame.wb_push_candidate1 == INVALID_REGNUM) ++ frame.wb_push_candidate1 = regno; ++ else if (frame.wb_push_candidate2 == INVALID_REGNUM) ++ frame.wb_push_candidate2 = regno; ++ offset += UNITS_PER_WORD; ++ }; ++ + if (frame.emit_frame_chain) + { + /* FP and LR are placed in the linkage record. */ +- frame.reg_offset[R29_REGNUM] = offset; +- frame.wb_push_candidate1 = R29_REGNUM; +- frame.reg_offset[R30_REGNUM] = offset + UNITS_PER_WORD; +- frame.wb_push_candidate2 = R30_REGNUM; +- offset += 2 * UNITS_PER_WORD; ++ allocate_gpr_slot (R29_REGNUM); ++ allocate_gpr_slot (R30_REGNUM); + } ++ else if (flag_stack_clash_protection ++ && known_eq (frame.reg_offset[R30_REGNUM], SLOT_REQUIRED)) ++ /* Put the LR save slot first, since it makes a good choice of probe ++ for stack clash purposes. The idea is that the link register usually ++ has to be saved before a call anyway, and so we lose little by ++ stopping it from being individually shrink-wrapped. */ ++ allocate_gpr_slot (R30_REGNUM); + + for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++) + if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) +- { +- frame.reg_offset[regno] = offset; +- if (frame.wb_push_candidate1 == INVALID_REGNUM) +- frame.wb_push_candidate1 = regno; +- else if (frame.wb_push_candidate2 == INVALID_REGNUM) +- frame.wb_push_candidate2 = regno; +- offset += UNITS_PER_WORD; +- } ++ allocate_gpr_slot (regno); + + poly_int64 max_int_offset = offset; + offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); +@@ -8631,10 +8639,13 @@ aarch64_layout_frame (void) + max_push_offset to 0, because no registers are popped at this time, + so callee_adjust cannot be adjusted. */ + HOST_WIDE_INT max_push_offset = 0; +- if (frame.wb_pop_candidate2 != INVALID_REGNUM) +- max_push_offset = 512; +- else if (frame.wb_pop_candidate1 != INVALID_REGNUM) +- max_push_offset = 256; ++ if (frame.wb_pop_candidate1 != INVALID_REGNUM) ++ { ++ if (frame.wb_pop_candidate2 != INVALID_REGNUM) ++ max_push_offset = 512; ++ else ++ max_push_offset = 256; ++ } + + HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; + HOST_WIDE_INT const_saved_regs_size; +@@ -9654,29 +9665,6 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, + = (final_adjustment_p + ? guard_used_by_caller + byte_sp_alignment + : guard_size - guard_used_by_caller); +- /* When doing the final adjustment for the outgoing arguments, take into +- account any unprobed space there is above the current SP. There are +- two cases: +- +- - When saving SVE registers below the hard frame pointer, we force +- the lowest save to take place in the prologue before doing the final +- adjustment (i.e. we don't allow the save to be shrink-wrapped). +- This acts as a probe at SP, so there is no unprobed space. +- +- - When there are no SVE register saves, we use the store of the link +- register as a probe. We can't assume that LR was saved at position 0 +- though, so treat any space below it as unprobed. */ +- if (final_adjustment_p +- && known_eq (frame.below_hard_fp_saved_regs_size, 0)) +- { +- poly_int64 lr_offset = (frame.reg_offset[LR_REGNUM] +- - frame.bytes_below_saved_regs); +- if (known_ge (lr_offset, 0)) +- min_probe_threshold -= lr_offset.to_constant (); +- else +- gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0)); +- } +- + poly_int64 frame_size = frame.frame_size; + + /* We should always have a positive probe threshold. */ +@@ -9856,8 +9844,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, + if (final_adjustment_p && rounded_size != 0) + min_probe_threshold = 0; + /* If doing a small final adjustment, we always probe at offset 0. +- This is done to avoid issues when LR is not at position 0 or when +- the final adjustment is smaller than the probing offset. */ ++ This is done to avoid issues when the final adjustment is smaller ++ than the probing offset. */ + else if (final_adjustment_p && rounded_size == 0) + residual_probe_offset = 0; + +diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c +new file mode 100644 +index 00000000000..82447d20fff +--- /dev/null ++++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c +@@ -0,0 +1,100 @@ ++/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */ ++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++void f(int, ...); ++void g(); ++ ++/* ++** test1: ++** ... ++** str x30, \[sp\] ++** sub sp, sp, #4064 ++** str xzr, \[sp\] ++** cbnz w0, .* ++** bl g ++** ... ++** str x26, \[sp, #?4128\] ++** ... ++*/ ++int test1(int z) { ++ __uint128_t x = 0; ++ int y[0x400]; ++ if (z) ++ { ++ asm volatile ("" ::: ++ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); ++ f(0, 0, 0, 0, 0, 0, 0, &y, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x); ++ } ++ g(); ++ return 1; ++} ++ ++/* ++** test2: ++** ... ++** str x30, \[sp\] ++** sub sp, sp, #1040 ++** str xzr, \[sp\] ++** cbnz w0, .* ++** bl g ++** ... ++*/ ++int test2(int z) { ++ __uint128_t x = 0; ++ int y[0x400]; ++ if (z) ++ { ++ asm volatile ("" ::: ++ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); ++ f(0, 0, 0, 0, 0, 0, 0, &y, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x); ++ } ++ g(); ++ return 1; ++} ++ ++/* ++** test3: ++** ... ++** str x30, \[sp\] ++** sub sp, sp, #1024 ++** cbnz w0, .* ++** bl g ++** ... ++*/ ++int test3(int z) { ++ __uint128_t x = 0; ++ int y[0x400]; ++ if (z) ++ { ++ asm volatile ("" ::: ++ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); ++ f(0, 0, 0, 0, 0, 0, 0, &y, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); ++ } ++ g(); ++ return 1; ++} +diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c +new file mode 100644 +index 00000000000..73ac3e4e4eb +--- /dev/null ++++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c +@@ -0,0 +1,100 @@ ++/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18" } */ ++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++void f(int, ...); ++void g(); ++ ++/* ++** test1: ++** ... ++** str x30, \[sp\] ++** sub sp, sp, #4064 ++** str xzr, \[sp\] ++** cbnz w0, .* ++** bl g ++** ... ++** str x26, \[sp, #?4128\] ++** ... ++*/ ++int test1(int z) { ++ __uint128_t x = 0; ++ int y[0x400]; ++ if (z) ++ { ++ asm volatile ("" ::: ++ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); ++ f(0, 0, 0, 0, 0, 0, 0, &y, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x); ++ } ++ g(); ++ return 1; ++} ++ ++/* ++** test2: ++** ... ++** str x30, \[sp\] ++** sub sp, sp, #1040 ++** str xzr, \[sp\] ++** cbnz w0, .* ++** bl g ++** ... ++*/ ++int test2(int z) { ++ __uint128_t x = 0; ++ int y[0x400]; ++ if (z) ++ { ++ asm volatile ("" ::: ++ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); ++ f(0, 0, 0, 0, 0, 0, 0, &y, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x); ++ } ++ g(); ++ return 1; ++} ++ ++/* ++** test3: ++** ... ++** str x30, \[sp\] ++** sub sp, sp, #1024 ++** cbnz w0, .* ++** bl g ++** ... ++*/ ++int test3(int z) { ++ __uint128_t x = 0; ++ int y[0x400]; ++ if (z) ++ { ++ asm volatile ("" ::: ++ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); ++ f(0, 0, 0, 0, 0, 0, 0, &y, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, ++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); ++ } ++ g(); ++ return 1; ++} +diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c +new file mode 100644 +index 00000000000..690aae8dfd5 +--- /dev/null ++++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c +@@ -0,0 +1,3 @@ ++/* { dg-options "-O2 -fstack-protector-all -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18" } */ ++ ++#include "stack-check-prologue-19.c" +-- +2.34.1 + + +From eea1759073e09dd1aefbc9a881601ab1eebfdd18 Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:19 +0100 +Subject: [PATCH 16/19] aarch64: Simplify probe of final frame allocation + +Previous patches ensured that the final frame allocation only needs +a probe when the size is strictly greater than 1KiB. It's therefore +safe to use the normal 1024 probe offset in all cases. + +The main motivation for doing this is to simplify the code and +remove the number of special cases. + +gcc/ + * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space): + Always probe the residual allocation at offset 1024, asserting + that that is in range. + +gcc/testsuite/ + * gcc.target/aarch64/stack-check-prologue-17.c: Expect the probe + to be at offset 1024 rather than offset 0. + * gcc.target/aarch64/stack-check-prologue-18.c: Likewise. + * gcc.target/aarch64/stack-check-prologue-19.c: Likewise. +--- + gcc/config/aarch64/aarch64.cc | 12 ++++-------- + .../gcc.target/aarch64/stack-check-prologue-17.c | 2 +- + .../gcc.target/aarch64/stack-check-prologue-18.c | 4 ++-- + .../gcc.target/aarch64/stack-check-prologue-19.c | 4 ++-- + 4 files changed, 9 insertions(+), 13 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index a765f92329d..37809a306f7 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -9838,16 +9838,12 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, + are still safe. */ + if (residual) + { +- HOST_WIDE_INT residual_probe_offset = guard_used_by_caller; ++ gcc_assert (guard_used_by_caller + byte_sp_alignment <= size); ++ + /* If we're doing final adjustments, and we've done any full page + allocations then any residual needs to be probed. */ + if (final_adjustment_p && rounded_size != 0) + min_probe_threshold = 0; +- /* If doing a small final adjustment, we always probe at offset 0. +- This is done to avoid issues when the final adjustment is smaller +- than the probing offset. */ +- else if (final_adjustment_p && rounded_size == 0) +- residual_probe_offset = 0; + + aarch64_sub_sp (temp1, temp2, residual, frame_related_p); + if (residual >= min_probe_threshold) +@@ -9858,8 +9854,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, + HOST_WIDE_INT_PRINT_DEC " bytes, probing will be required." + "\n", residual); + +- emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx, +- residual_probe_offset)); ++ emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx, ++ guard_used_by_caller)); + emit_insn (gen_blockage ()); + } + } +diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c +index 0d8a25d73a2..f0ec1389771 100644 +--- a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c ++++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c +@@ -33,7 +33,7 @@ int test1(int z) { + ** ... + ** str x30, \[sp\] + ** sub sp, sp, #1040 +-** str xzr, \[sp\] ++** str xzr, \[sp, #?1024\] + ** cbnz w0, .* + ** bl g + ** ... +diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c +index 82447d20fff..6383bec5ebc 100644 +--- a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c ++++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c +@@ -9,7 +9,7 @@ void g(); + ** ... + ** str x30, \[sp\] + ** sub sp, sp, #4064 +-** str xzr, \[sp\] ++** str xzr, \[sp, #?1024\] + ** cbnz w0, .* + ** bl g + ** ... +@@ -50,7 +50,7 @@ int test1(int z) { + ** ... + ** str x30, \[sp\] + ** sub sp, sp, #1040 +-** str xzr, \[sp\] ++** str xzr, \[sp, #?1024\] + ** cbnz w0, .* + ** bl g + ** ... +diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c +index 73ac3e4e4eb..562039b5e9b 100644 +--- a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c ++++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c +@@ -9,7 +9,7 @@ void g(); + ** ... + ** str x30, \[sp\] + ** sub sp, sp, #4064 +-** str xzr, \[sp\] ++** str xzr, \[sp, #?1024\] + ** cbnz w0, .* + ** bl g + ** ... +@@ -50,7 +50,7 @@ int test1(int z) { + ** ... + ** str x30, \[sp\] + ** sub sp, sp, #1040 +-** str xzr, \[sp\] ++** str xzr, \[sp, #?1024\] + ** cbnz w0, .* + ** bl g + ** ... +-- +2.34.1 + + +From 96d85187c3b9c9a7efc2fd698c3d452e80d8aa47 Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:20 +0100 +Subject: [PATCH 17/19] aarch64: Explicitly record probe registers in frame + info + +The stack frame is currently divided into three areas: + +A: the area above the hard frame pointer +B: the SVE saves below the hard frame pointer +C: the outgoing arguments + +If the stack frame is allocated in one chunk, the allocation needs a +probe if the frame size is >= guard_size - 1KiB. In addition, if the +function is not a leaf function, it must probe an address no more than +1KiB above the outgoing SP. We ensured the second condition by + +(1) using single-chunk allocations for non-leaf functions only if + the link register save slot is within 512 bytes of the bottom + of the frame; and + +(2) using the link register save as a probe (meaning, for instance, + that it can't be individually shrink wrapped) + +If instead the stack is allocated in multiple chunks, then: + +* an allocation involving only the outgoing arguments (C above) requires + a probe if the allocation size is > 1KiB + +* any other allocation requires a probe if the allocation size + is >= guard_size - 1KiB + +* second and subsequent allocations require the previous allocation + to probe at the bottom of the allocated area, regardless of the size + of that previous allocation + +The final point means that, unlike for single allocations, +it can be necessary to have both a non-SVE register probe and +an SVE register probe. For example: + +* allocate A, probe using a non-SVE register save +* allocate B, probe using an SVE register save +* allocate C + +The non-SVE register used in this case was again the link register. +It was previously used even if the link register save slot was some +bytes above the bottom of the non-SVE register saves, but an earlier +patch avoided that by putting the link register save slot first. + +As a belt-and-braces fix, this patch explicitly records which +probe registers we're using and allows the non-SVE probe to be +whichever register comes first (as for SVE). + +The patch also avoids unnecessary probes in sve/pcs/stack_clash_3.c. + +gcc/ + * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe) + (aarch64_frame::hard_fp_save_and_probe): New fields. + * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them. + Rather than asserting that a leaf function saves LR, instead assert + that a leaf function saves something. + (aarch64_get_separate_components): Prevent the chosen probe + registers from being individually shrink-wrapped. + (aarch64_allocate_and_probe_stack_space): Remove workaround for + probe registers that aren't at the bottom of the previous allocation. + +gcc/testsuite/ + * gcc.target/aarch64/sve/pcs/stack_clash_3.c: Avoid redundant probes. +--- + gcc/config/aarch64/aarch64.cc | 68 +++++++++++++++---- + gcc/config/aarch64/aarch64.h | 8 +++ + .../aarch64/sve/pcs/stack_clash_3.c | 6 +- + 3 files changed, 64 insertions(+), 18 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 37809a306f7..6c59c39a639 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8471,15 +8471,11 @@ aarch64_layout_frame (void) + && !crtl->abi->clobbers_full_reg_p (regno)) + frame.reg_offset[regno] = SLOT_REQUIRED; + +- /* With stack-clash, LR must be saved in non-leaf functions. The saving of +- LR counts as an implicit probe which allows us to maintain the invariant +- described in the comment at expand_prologue. */ +- gcc_assert (crtl->is_leaf +- || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); + + poly_int64 offset = crtl->outgoing_args_size; + gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); + frame.bytes_below_saved_regs = offset; ++ frame.sve_save_and_probe = INVALID_REGNUM; + + /* Now assign stack slots for the registers. Start with the predicate + registers, since predicate LDR and STR have a relatively small +@@ -8487,6 +8483,8 @@ aarch64_layout_frame (void) + for (regno = P0_REGNUM; regno <= P15_REGNUM; regno++) + if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) + { ++ if (frame.sve_save_and_probe == INVALID_REGNUM) ++ frame.sve_save_and_probe = regno; + frame.reg_offset[regno] = offset; + offset += BYTES_PER_SVE_PRED; + } +@@ -8524,6 +8522,8 @@ aarch64_layout_frame (void) + for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) + if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) + { ++ if (frame.sve_save_and_probe == INVALID_REGNUM) ++ frame.sve_save_and_probe = regno; + frame.reg_offset[regno] = offset; + offset += vector_save_size; + } +@@ -8533,10 +8533,18 @@ aarch64_layout_frame (void) + frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; + bool saves_below_hard_fp_p + = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); ++ gcc_assert (!saves_below_hard_fp_p ++ || (frame.sve_save_and_probe != INVALID_REGNUM ++ && known_eq (frame.reg_offset[frame.sve_save_and_probe], ++ frame.bytes_below_saved_regs))); ++ + frame.bytes_below_hard_fp = offset; ++ frame.hard_fp_save_and_probe = INVALID_REGNUM; + + auto allocate_gpr_slot = [&](unsigned int regno) + { ++ if (frame.hard_fp_save_and_probe == INVALID_REGNUM) ++ frame.hard_fp_save_and_probe = regno; + frame.reg_offset[regno] = offset; + if (frame.wb_push_candidate1 == INVALID_REGNUM) + frame.wb_push_candidate1 = regno; +@@ -8570,6 +8578,8 @@ aarch64_layout_frame (void) + for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) + if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) + { ++ if (frame.hard_fp_save_and_probe == INVALID_REGNUM) ++ frame.hard_fp_save_and_probe = regno; + /* If there is an alignment gap between integer and fp callee-saves, + allocate the last fp register to it if possible. */ + if (regno == last_fp_reg +@@ -8593,6 +8603,17 @@ aarch64_layout_frame (void) + offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); + + frame.saved_regs_size = offset - frame.bytes_below_saved_regs; ++ gcc_assert (known_eq (frame.saved_regs_size, ++ frame.below_hard_fp_saved_regs_size) ++ || (frame.hard_fp_save_and_probe != INVALID_REGNUM ++ && known_eq (frame.reg_offset[frame.hard_fp_save_and_probe], ++ frame.bytes_below_hard_fp))); ++ ++ /* With stack-clash, a register must be saved in non-leaf functions. ++ The saving of the bottommost register counts as an implicit probe, ++ which allows us to maintain the invariant described in the comment ++ at expand_prologue. */ ++ gcc_assert (crtl->is_leaf || maybe_ne (frame.saved_regs_size, 0)); + + offset += get_frame_size (); + offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); +@@ -8723,6 +8744,25 @@ aarch64_layout_frame (void) + frame.final_adjust = frame.bytes_below_saved_regs; + } + ++ /* The frame is allocated in pieces, with each non-final piece ++ including a register save at offset 0 that acts as a probe for ++ the following piece. In addition, the save of the bottommost register ++ acts as a probe for callees and allocas. Roll back any probes that ++ aren't needed. ++ ++ A probe isn't needed if it is associated with the final allocation ++ (including callees and allocas) that happens before the epilogue is ++ executed. */ ++ if (crtl->is_leaf ++ && !cfun->calls_alloca ++ && known_eq (frame.final_adjust, 0)) ++ { ++ if (maybe_ne (frame.sve_callee_adjust, 0)) ++ frame.sve_save_and_probe = INVALID_REGNUM; ++ else ++ frame.hard_fp_save_and_probe = INVALID_REGNUM; ++ } ++ + /* Make sure the individual adjustments add up to the full frame size. */ + gcc_assert (known_eq (frame.initial_adjust + + frame.callee_adjust +@@ -9354,13 +9394,6 @@ aarch64_get_separate_components (void) + + poly_int64 offset = frame.reg_offset[regno]; + +- /* If the register is saved in the first SVE save slot, we use +- it as a stack probe for -fstack-clash-protection. */ +- if (flag_stack_clash_protection +- && maybe_ne (frame.below_hard_fp_saved_regs_size, 0) +- && known_eq (offset, frame.bytes_below_saved_regs)) +- continue; +- + /* Get the offset relative to the register we'll use. */ + if (frame_pointer_needed) + offset -= frame.bytes_below_hard_fp; +@@ -9395,6 +9428,13 @@ aarch64_get_separate_components (void) + + bitmap_clear_bit (components, LR_REGNUM); + bitmap_clear_bit (components, SP_REGNUM); ++ if (flag_stack_clash_protection) ++ { ++ if (frame.sve_save_and_probe != INVALID_REGNUM) ++ bitmap_clear_bit (components, frame.sve_save_and_probe); ++ if (frame.hard_fp_save_and_probe != INVALID_REGNUM) ++ bitmap_clear_bit (components, frame.hard_fp_save_and_probe); ++ } + + return components; + } +@@ -9931,8 +9971,8 @@ aarch64_epilogue_uses (int regno) + When probing is needed, we emit a probe at the start of the prologue + and every PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE bytes thereafter. + +- We have to track how much space has been allocated and the only stores +- to the stack we track as implicit probes are the FP/LR stores. ++ We can also use register saves as probes. These are stored in ++ sve_save_and_probe and hard_fp_save_and_probe. + + For outgoing arguments we probe if the size is larger than 1KB, such that + the ABI specified buffer is maintained for the next callee. +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index c8becb098c8..fbfb73545ba 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -863,6 +863,14 @@ struct GTY (()) aarch64_frame + This is the register they should use. */ + unsigned spare_pred_reg; + ++ /* An SVE register that is saved below the hard frame pointer and that acts ++ as a probe for later allocations, or INVALID_REGNUM if none. */ ++ unsigned sve_save_and_probe; ++ ++ /* A register that is saved at the hard frame pointer and that acts ++ as a probe for later allocations, or INVALID_REGNUM if none. */ ++ unsigned hard_fp_save_and_probe; ++ + bool laid_out; + + /* True if shadow call stack should be enabled for the current function. */ +diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c +index 3e01ec36c3a..3530a0d504b 100644 +--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c ++++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c +@@ -11,11 +11,10 @@ + ** mov x11, sp + ** ... + ** sub sp, sp, x13 +-** str p4, \[sp\] + ** cbz w0, [^\n]* ++** str p4, \[sp\] + ** ... + ** ptrue p0\.b, all +-** ldr p4, \[sp\] + ** addvl sp, sp, #1 + ** ldr x24, \[sp\], 32 + ** ret +@@ -39,13 +38,12 @@ test_1 (int n) + ** mov x11, sp + ** ... + ** sub sp, sp, x13 +-** str p4, \[sp\] + ** cbz w0, [^\n]* ++** str p4, \[sp\] + ** str p5, \[sp, #1, mul vl\] + ** str p6, \[sp, #2, mul vl\] + ** ... + ** ptrue p0\.b, all +-** ldr p4, \[sp\] + ** addvl sp, sp, #1 + ** ldr x24, \[sp\], 32 + ** ret +-- +2.34.1 + + +From 56df065080950bb30dda9c260f71be54269bdda5 Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:20 +0100 +Subject: [PATCH 18/19] aarch64: Remove below_hard_fp_saved_regs_size + +After previous patches, it's no longer necessary to store +saved_regs_size and below_hard_fp_saved_regs_size in the frame info. +All measurements instead use the top or bottom of the frame as +reference points. + +gcc/ + * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size) + (aarch64_frame::below_hard_fp_saved_regs_size): Delete. + * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly. +--- + gcc/config/aarch64/aarch64.cc | 45 ++++++++++++++++------------------- + gcc/config/aarch64/aarch64.h | 7 ------ + 2 files changed, 21 insertions(+), 31 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index 6c59c39a639..b95e805a8cc 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8530,9 +8530,8 @@ aarch64_layout_frame (void) + + /* OFFSET is now the offset of the hard frame pointer from the bottom + of the callee save area. */ +- frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; +- bool saves_below_hard_fp_p +- = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); ++ auto below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; ++ bool saves_below_hard_fp_p = maybe_ne (below_hard_fp_saved_regs_size, 0); + gcc_assert (!saves_below_hard_fp_p + || (frame.sve_save_and_probe != INVALID_REGNUM + && known_eq (frame.reg_offset[frame.sve_save_and_probe], +@@ -8602,9 +8601,8 @@ aarch64_layout_frame (void) + + offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); + +- frame.saved_regs_size = offset - frame.bytes_below_saved_regs; +- gcc_assert (known_eq (frame.saved_regs_size, +- frame.below_hard_fp_saved_regs_size) ++ auto saved_regs_size = offset - frame.bytes_below_saved_regs; ++ gcc_assert (known_eq (saved_regs_size, below_hard_fp_saved_regs_size) + || (frame.hard_fp_save_and_probe != INVALID_REGNUM + && known_eq (frame.reg_offset[frame.hard_fp_save_and_probe], + frame.bytes_below_hard_fp))); +@@ -8613,7 +8611,7 @@ aarch64_layout_frame (void) + The saving of the bottommost register counts as an implicit probe, + which allows us to maintain the invariant described in the comment + at expand_prologue. */ +- gcc_assert (crtl->is_leaf || maybe_ne (frame.saved_regs_size, 0)); ++ gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0)); + + offset += get_frame_size (); + offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); +@@ -8670,7 +8668,7 @@ aarch64_layout_frame (void) + + HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; + HOST_WIDE_INT const_saved_regs_size; +- if (known_eq (frame.saved_regs_size, 0)) ++ if (known_eq (saved_regs_size, 0)) + frame.initial_adjust = frame.frame_size; + else if (frame.frame_size.is_constant (&const_size) + && const_size < max_push_offset +@@ -8683,7 +8681,7 @@ aarch64_layout_frame (void) + frame.callee_adjust = const_size; + } + else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs) +- && frame.saved_regs_size.is_constant (&const_saved_regs_size) ++ && saved_regs_size.is_constant (&const_saved_regs_size) + && const_below_saved_regs + const_saved_regs_size < 512 + /* We could handle this case even with data below the saved + registers, provided that that data left us with valid offsets +@@ -8702,8 +8700,7 @@ aarch64_layout_frame (void) + frame.initial_adjust = frame.frame_size; + } + else if (saves_below_hard_fp_p +- && known_eq (frame.saved_regs_size, +- frame.below_hard_fp_saved_regs_size)) ++ && known_eq (saved_regs_size, below_hard_fp_saved_regs_size)) + { + /* Frame in which all saves are SVE saves: + +@@ -8725,7 +8722,7 @@ aarch64_layout_frame (void) + [save SVE registers relative to SP] + sub sp, sp, bytes_below_saved_regs */ + frame.callee_adjust = const_above_fp; +- frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; ++ frame.sve_callee_adjust = below_hard_fp_saved_regs_size; + frame.final_adjust = frame.bytes_below_saved_regs; + } + else +@@ -8740,7 +8737,7 @@ aarch64_layout_frame (void) + [save SVE registers relative to SP] + sub sp, sp, bytes_below_saved_regs */ + frame.initial_adjust = frame.bytes_above_hard_fp; +- frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; ++ frame.sve_callee_adjust = below_hard_fp_saved_regs_size; + frame.final_adjust = frame.bytes_below_saved_regs; + } + +@@ -9936,17 +9933,17 @@ aarch64_epilogue_uses (int regno) + | local variables | <-- frame_pointer_rtx + | | + +-------------------------------+ +- | padding | \ +- +-------------------------------+ | +- | callee-saved registers | | frame.saved_regs_size +- +-------------------------------+ | +- | LR' | | +- +-------------------------------+ | +- | FP' | | +- +-------------------------------+ |<- hard_frame_pointer_rtx (aligned) +- | SVE vector registers | | \ +- +-------------------------------+ | | below_hard_fp_saved_regs_size +- | SVE predicate registers | / / ++ | padding | ++ +-------------------------------+ ++ | callee-saved registers | ++ +-------------------------------+ ++ | LR' | ++ +-------------------------------+ ++ | FP' | ++ +-------------------------------+ <-- hard_frame_pointer_rtx (aligned) ++ | SVE vector registers | ++ +-------------------------------+ ++ | SVE predicate registers | + +-------------------------------+ + | dynamic allocation | + +-------------------------------+ +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index fbfb73545ba..cfeaf4657ab 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -777,18 +777,11 @@ struct GTY (()) aarch64_frame + STACK_BOUNDARY. */ + HOST_WIDE_INT saved_varargs_size; + +- /* The size of the callee-save registers with a slot in REG_OFFSET. */ +- poly_int64 saved_regs_size; +- + /* The number of bytes between the bottom of the static frame (the bottom + of the outgoing arguments) and the bottom of the register save area. + This value is always a multiple of STACK_BOUNDARY. */ + poly_int64 bytes_below_saved_regs; + +- /* The size of the callee-save registers with a slot in REG_OFFSET that +- are saved below the hard frame pointer. */ +- poly_int64 below_hard_fp_saved_regs_size; +- + /* The number of bytes between the bottom of the static frame (the bottom + of the outgoing arguments) and the hard frame pointer. This value is + always a multiple of STACK_BOUNDARY. */ +-- +2.34.1 + + +From b96e66fd4ef3e36983969fb8cdd1956f551a074b Mon Sep 17 00:00:00 2001 +From: Richard Sandiford <richard.sandiford@arm.com> +Date: Tue, 12 Sep 2023 16:07:21 +0100 +Subject: [PATCH 19/19] aarch64: Make stack smash canary protect saved + registers + +AArch64 normally puts the saved registers near the bottom of the frame, +immediately above any dynamic allocations. But this means that a +stack-smash attack on those dynamic allocations could overwrite the +saved registers without needing to reach as far as the stack smash +canary. + +The same thing could also happen for variable-sized arguments that are +passed by value, since those are allocated before a call and popped on +return. + +This patch avoids that by putting the locals (and thus the canary) below +the saved registers when stack smash protection is active. + +The patch fixes CVE-2023-4039. + +gcc/ + * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p): + New function. + (aarch64_layout_frame): Use it to decide whether locals should + go above or below the saved registers. + (aarch64_expand_prologue): Update stack layout comment. + Emit a stack tie after the final adjustment. + +gcc/testsuite/ + * gcc.target/aarch64/stack-protector-8.c: New test. + * gcc.target/aarch64/stack-protector-9.c: Likewise. +--- + gcc/config/aarch64/aarch64.cc | 46 +++++++-- + .../gcc.target/aarch64/stack-protector-8.c | 95 +++++++++++++++++++ + .../gcc.target/aarch64/stack-protector-9.c | 33 +++++++ + 3 files changed, 168 insertions(+), 6 deletions(-) + create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-protector-8.c + create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-protector-9.c + +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index b95e805a8cc..389c0e29353 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -8394,6 +8394,20 @@ aarch64_needs_frame_chain (void) + return aarch64_use_frame_pointer; + } + ++/* Return true if the current function should save registers above ++ the locals area, rather than below it. */ ++ ++static bool ++aarch64_save_regs_above_locals_p () ++{ ++ /* When using stack smash protection, make sure that the canary slot ++ comes between the locals and the saved registers. Otherwise, ++ it would be possible for a carefully sized smash attack to change ++ the saved registers (particularly LR and FP) without reaching the ++ canary. */ ++ return crtl->stack_protect_guard; ++} ++ + /* Mark the registers that need to be saved by the callee and calculate + the size of the callee-saved registers area and frame record (both FP + and LR may be omitted). */ +@@ -8405,6 +8419,7 @@ aarch64_layout_frame (void) + poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode); + bool frame_related_fp_reg_p = false; + aarch64_frame &frame = cfun->machine->frame; ++ poly_int64 top_of_locals = -1; + + frame.emit_frame_chain = aarch64_needs_frame_chain (); + +@@ -8471,9 +8486,16 @@ aarch64_layout_frame (void) + && !crtl->abi->clobbers_full_reg_p (regno)) + frame.reg_offset[regno] = SLOT_REQUIRED; + ++ bool regs_at_top_p = aarch64_save_regs_above_locals_p (); + + poly_int64 offset = crtl->outgoing_args_size; + gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); ++ if (regs_at_top_p) ++ { ++ offset += get_frame_size (); ++ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); ++ top_of_locals = offset; ++ } + frame.bytes_below_saved_regs = offset; + frame.sve_save_and_probe = INVALID_REGNUM; + +@@ -8613,15 +8635,18 @@ aarch64_layout_frame (void) + at expand_prologue. */ + gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0)); + +- offset += get_frame_size (); +- offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); +- auto top_of_locals = offset; +- ++ if (!regs_at_top_p) ++ { ++ offset += get_frame_size (); ++ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); ++ top_of_locals = offset; ++ } + offset += frame.saved_varargs_size; + gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); + frame.frame_size = offset; + + frame.bytes_above_hard_fp = frame.frame_size - frame.bytes_below_hard_fp; ++ gcc_assert (known_ge (top_of_locals, 0)); + frame.bytes_above_locals = frame.frame_size - top_of_locals; + + frame.initial_adjust = 0; +@@ -9930,10 +9955,10 @@ aarch64_epilogue_uses (int regno) + | for register varargs | + | | + +-------------------------------+ +- | local variables | <-- frame_pointer_rtx ++ | local variables (1) | <-- frame_pointer_rtx + | | + +-------------------------------+ +- | padding | ++ | padding (1) | + +-------------------------------+ + | callee-saved registers | + +-------------------------------+ +@@ -9945,6 +9970,10 @@ aarch64_epilogue_uses (int regno) + +-------------------------------+ + | SVE predicate registers | + +-------------------------------+ ++ | local variables (2) | ++ +-------------------------------+ ++ | padding (2) | ++ +-------------------------------+ + | dynamic allocation | + +-------------------------------+ + | padding | +@@ -9954,6 +9983,9 @@ aarch64_epilogue_uses (int regno) + +-------------------------------+ + | | <-- stack_pointer_rtx (aligned) + ++ The regions marked (1) and (2) are mutually exclusive. (2) is used ++ when aarch64_save_regs_above_locals_p is true. ++ + Dynamic stack allocations via alloca() decrease stack_pointer_rtx + but leave frame_pointer_rtx and hard_frame_pointer_rtx + unchanged. +@@ -10149,6 +10181,8 @@ aarch64_expand_prologue (void) + gcc_assert (known_eq (bytes_below_sp, final_adjust)); + aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust, + !frame_pointer_needed, true); ++ if (emit_frame_chain && maybe_ne (final_adjust, 0)) ++ emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); + } + + /* Return TRUE if we can use a simple_return insn. +diff --git a/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c b/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c +new file mode 100644 +index 00000000000..e71d820e365 +--- /dev/null ++++ b/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c +@@ -0,0 +1,95 @@ ++/* { dg-options " -O -fstack-protector-strong -mstack-protector-guard=sysreg -mstack-protector-guard-reg=tpidr2_el0 -mstack-protector-guard-offset=16" } */ ++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++void g(void *); ++__SVBool_t *h(void *); ++ ++/* ++** test1: ++** sub sp, sp, #288 ++** stp x29, x30, \[sp, #?272\] ++** add x29, sp, #?272 ++** mrs (x[0-9]+), tpidr2_el0 ++** ldr (x[0-9]+), \[\1, #?16\] ++** str \2, \[sp, #?264\] ++** mov \2, #?0 ++** add x0, sp, #?8 ++** bl g ++** ... ++** mrs .* ++** ... ++** bne .* ++** ... ++** ldp x29, x30, \[sp, #?272\] ++** add sp, sp, #?288 ++** ret ++** bl __stack_chk_fail ++*/ ++int test1() { ++ int y[0x40]; ++ g(y); ++ return 1; ++} ++ ++/* ++** test2: ++** stp x29, x30, \[sp, #?-16\]! ++** mov x29, sp ++** sub sp, sp, #1040 ++** mrs (x[0-9]+), tpidr2_el0 ++** ldr (x[0-9]+), \[\1, #?16\] ++** str \2, \[sp, #?1032\] ++** mov \2, #?0 ++** add x0, sp, #?8 ++** bl g ++** ... ++** mrs .* ++** ... ++** bne .* ++** ... ++** add sp, sp, #?1040 ++** ldp x29, x30, \[sp\], #?16 ++** ret ++** bl __stack_chk_fail ++*/ ++int test2() { ++ int y[0x100]; ++ g(y); ++ return 1; ++} ++ ++#pragma GCC target "+sve" ++ ++/* ++** test3: ++** stp x29, x30, \[sp, #?-16\]! ++** mov x29, sp ++** addvl sp, sp, #-18 ++** ... ++** str p4, \[sp\] ++** ... ++** sub sp, sp, #272 ++** mrs (x[0-9]+), tpidr2_el0 ++** ldr (x[0-9]+), \[\1, #?16\] ++** str \2, \[sp, #?264\] ++** mov \2, #?0 ++** add x0, sp, #?8 ++** bl h ++** ... ++** mrs .* ++** ... ++** bne .* ++** ... ++** add sp, sp, #?272 ++** ... ++** ldr p4, \[sp\] ++** ... ++** addvl sp, sp, #18 ++** ldp x29, x30, \[sp\], #?16 ++** ret ++** bl __stack_chk_fail ++*/ ++__SVBool_t test3() { ++ int y[0x40]; ++ return *h(y); ++} +diff --git a/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c b/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c +new file mode 100644 +index 00000000000..58f322aa480 +--- /dev/null ++++ b/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c +@@ -0,0 +1,33 @@ ++/* { dg-options "-O2 -mcpu=neoverse-v1 -fstack-protector-all" } */ ++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++/* ++** main: ++** ... ++** stp x29, x30, \[sp, #?-[0-9]+\]! ++** ... ++** sub sp, sp, #[0-9]+ ++** ... ++** str x[0-9]+, \[x29, #?-8\] ++** ... ++*/ ++int f(const char *); ++void g(void *); ++int main(int argc, char* argv[]) ++{ ++ int a; ++ int b; ++ char c[2+f(argv[1])]; ++ int d[0x100]; ++ char y; ++ ++ y=42; a=4; b=10; ++ c[0] = 'h'; c[1] = '\0'; ++ ++ c[f(argv[2])] = '\0'; ++ ++ __builtin_printf("%d %d\n%s\n", a, b, c); ++ g(d); ++ ++ return 0; ++} +-- +2.34.1 + |