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Diffstat (limited to 'extras/recipes-kernel/linux/linux-omap/media/0036-v4l-Add-remaining-RAW10-patterns-w-DPCM-pixel-code-v.patch')
-rw-r--r--extras/recipes-kernel/linux/linux-omap/media/0036-v4l-Add-remaining-RAW10-patterns-w-DPCM-pixel-code-v.patch48
1 files changed, 48 insertions, 0 deletions
diff --git a/extras/recipes-kernel/linux/linux-omap/media/0036-v4l-Add-remaining-RAW10-patterns-w-DPCM-pixel-code-v.patch b/extras/recipes-kernel/linux/linux-omap/media/0036-v4l-Add-remaining-RAW10-patterns-w-DPCM-pixel-code-v.patch
new file mode 100644
index 00000000..ec6c332f
--- /dev/null
+++ b/extras/recipes-kernel/linux/linux-omap/media/0036-v4l-Add-remaining-RAW10-patterns-w-DPCM-pixel-code-v.patch
@@ -0,0 +1,48 @@
+From a63be84f54298581d51efb8a4745747ca17a9d0d Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Date: Fri, 3 Sep 2010 10:47:25 +0200
+Subject: [PATCH 36/43] v4l: Add remaining RAW10 patterns w DPCM pixel code variants
+
+This adds following formats:
+- V4L2_MBUS_FMT_SRGGB10_1X10
+- V4L2_MBUS_FMT_SGBRG10_1X10
+- V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8
+- V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8
+- V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8
+
+Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
+Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+---
+ include/linux/v4l2-mediabus.h | 7 ++++++-
+ 1 files changed, 6 insertions(+), 1 deletions(-)
+
+diff --git a/include/linux/v4l2-mediabus.h b/include/linux/v4l2-mediabus.h
+index c4caca3..5c64924 100644
+--- a/include/linux/v4l2-mediabus.h
++++ b/include/linux/v4l2-mediabus.h
+@@ -67,16 +67,21 @@ enum v4l2_mbus_pixelcode {
+ V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d,
+ V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e,
+
+- /* Bayer - next is 0x300b */
++ /* Bayer - next is 0x3010 */
+ V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001,
+ V4L2_MBUS_FMT_SGRBG8_1X8 = 0x3002,
++ V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8 = 0x300b,
++ V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8 = 0x300c,
+ V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8 = 0x3009,
++ V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8 = 0x300d,
+ V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE = 0x3003,
+ V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE = 0x3004,
+ V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE = 0x3005,
+ V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE = 0x3006,
+ V4L2_MBUS_FMT_SBGGR10_1X10 = 0x3007,
++ V4L2_MBUS_FMT_SGBRG10_1X10 = 0x300e,
+ V4L2_MBUS_FMT_SGRBG10_1X10 = 0x300a,
++ V4L2_MBUS_FMT_SRGGB10_1X10 = 0x300f,
+ V4L2_MBUS_FMT_SBGGR12_1X12 = 0x3008,
+ };
+
+--
+1.6.6.1
+