diff options
Diffstat (limited to 'recipes-kernel/linux/linux-yocto/qrb2210-dts')
12 files changed, 1311 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/0001-arm64-dts-qcom-qcm2290-Hook-up-MPM.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/0001-arm64-dts-qcom-qcm2290-Hook-up-MPM.patch new file mode 100644 index 0000000..d1e935d --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/0001-arm64-dts-qcom-qcm2290-Hook-up-MPM.patch @@ -0,0 +1,114 @@ +From e3f6a699404154e7e103f8055f21c3556721603f Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Fri, 15 Dec 2023 01:01:10 +0100 +Subject: [PATCH] arm64: dts: qcom: qcm2290: Hook up MPM + +Wire up MPM and the interrupts it provides. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231215-topic-mpm_dt-v1-3-c6636fc75ce3@linaro.org +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git e3f6a699404154e7e103f8055f21c3556721603f] +--- + arch/arm64/boot/dts/qcom/qcm2290.dtsi | 42 ++++++++++++++++++++++----- + 1 file changed, 35 insertions(+), 7 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +index ce04d0acdede..0911fb08ed63 100644 +--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi ++++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +@@ -199,6 +199,7 @@ CPU_PD3: power-domain-cpu3 { + + CLUSTER_PD: power-domain-cpu-cluster { + #power-domain-cells = <0>; ++ power-domains = <&mpm>; + domain-idle-states = <&CLUSTER_SLEEP>; + }; + }; +@@ -266,6 +267,24 @@ rpmpd_opp_turbo_plus: opp8 { + }; + }; + }; ++ ++ mpm: interrupt-controller { ++ compatible = "qcom,mpm"; ++ qcom,rpm-msg-ram = <&apss_mpm>; ++ interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; ++ mboxes = <&apcs_glb 1>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ #power-domain-cells = <0>; ++ interrupt-parent = <&intc>; ++ qcom,mpm-pin-count = <96>; ++ qcom,mpm-pin-map = <2 275>, /* TSENS0 uplow */ ++ <5 296>, /* Soundwire master_irq */ ++ <12 422>, /* DWC3 ss_phy_irq */ ++ <24 79>, /* Soundwire wake_irq */ ++ <86 183>, /* MPM wake, SPMI */ ++ <90 260>; /* QUSB2_PHY DP+DM */ ++ }; + }; + + reserved_memory: reserved-memory { +@@ -429,6 +448,7 @@ tlmm: pinctrl@500000 { + interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + gpio-ranges = <&tlmm 0 0 127>; ++ wakeup-parent = <&mpm>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; +@@ -778,7 +798,7 @@ spmi_bus: spmi@1c40000 { + "obsrvr", + "intr", + "cnfg"; +- interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts-extended = <&mpm 86 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "periph_irq"; + qcom,ee = <0>; + qcom,channel = <0>; +@@ -793,8 +813,8 @@ tsens0: thermal-sensor@4411000 { + reg = <0x0 0x04411000 0x0 0x1ff>, + <0x0 0x04410000 0x0 0x8>; + #qcom,sensors = <10>; +- interrupts = <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, +- <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts-extended = <&mpm 2 IRQ_TYPE_LEVEL_HIGH>, ++ <&intc GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; +@@ -813,8 +833,15 @@ bimc: interconnect@4480000 { + }; + + rpm_msg_ram: sram@45f0000 { +- compatible = "qcom,rpm-msg-ram"; ++ compatible = "qcom,rpm-msg-ram", "mmio-sram"; + reg = <0x0 0x045f0000 0x0 0x7000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0 0x0 0x045f0000 0x7000>; ++ ++ apss_mpm: sram@1b8 { ++ reg = <0x1b8 0x48>; ++ }; + }; + + sram@4690000 { +@@ -1293,9 +1320,10 @@ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, + usb: usb@4ef8800 { + compatible = "qcom,qcm2290-dwc3", "qcom,dwc3"; + reg = <0x0 0x04ef8800 0x0 0x400>; +- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, +- <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; +- interrupt-names = "hs_phy_irq", "ss_phy_irq"; ++ interrupts-extended = <&intc GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, ++ <&mpm 12 IRQ_TYPE_LEVEL_HIGH>; ++ interrupt-names = "hs_phy_irq", ++ "ss_phy_irq"; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0006_arm64_dts_qcom_sc7180_add_the_missing_mdss_icc_path.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0006_arm64_dts_qcom_sc7180_add_the_missing_mdss_icc_path.patch new file mode 100644 index 0000000..d6d6807 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0006_arm64_dts_qcom_sc7180_add_the_missing_mdss_icc_path.patch @@ -0,0 +1,37 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: sc7180: Add the missing MDSS icc path +Date: Wed, 29 Nov 2023 15:44:03 +0100 + +MDSS, aside from the MDP-MEM path, also requires the CPU-DISP_CFG one. +Failing to provide it may result in register accesses failing and that's +never good. + +Add the missing path. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 8786398f8686d1a4267ab52f830b25f17e6d62fc] +--- + arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi +index 11f353d416b4..9664e42faeb1 100644 +--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi +@@ -3100,8 +3100,12 @@ mdss: display-subsystem@ae00000 { + interrupt-controller; + #interrupt-cells = <1>; + +- interconnects = <&mmss_noc MASTER_MDP0 0 &mc_virt SLAVE_EBI1 0>; +- interconnect-names = "mdp0-mem"; ++ interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ALWAYS ++ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, ++ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS ++ &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ALWAYS>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; + + iommus = <&apps_smmu 0x800 0x2>; + +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0007_arm64_dts_qcom_sc7280_add_the_missing_mdss_icc_path.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0007_arm64_dts_qcom_sc7280_add_the_missing_mdss_icc_path.patch new file mode 100644 index 0000000..cc2fa10 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0007_arm64_dts_qcom_sc7280_add_the_missing_mdss_icc_path.patch @@ -0,0 +1,45 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: sc7280: Add the missing MDSS icc path +Date: Wed, 29 Nov 2023 15:44:04 +0100 + +MDSS, aside from the MDP-MEM path, also requires the CPU-DISP_CFG one. +Failing to provide it may result in register accesses failing and that's +never good. + +Add the missing path. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git c657056d99878c8a8ea84d5d4a9101bcb90b47f2] +--- + arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi +index 04bf85b0399a..41d327b1f1b6 100644 +--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi +@@ -15,6 +15,7 @@ + #include <dt-bindings/dma/qcom-gpi.h> + #include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> ++#include <dt-bindings/interconnect/qcom,icc.h> + #include <dt-bindings/interconnect/qcom,osm-l3.h> + #include <dt-bindings/interconnect/qcom,sc7280.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> +@@ -3958,8 +3959,12 @@ mdss: display-subsystem@ae00000 { + interrupt-controller; + #interrupt-cells = <1>; + +- interconnects = <&mmss_noc MASTER_MDP0 0 &mc_virt SLAVE_EBI1 0>; +- interconnect-names = "mdp0-mem"; ++ interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ALWAYS ++ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, ++ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS ++ &cnoc2 SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ALWAYS>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; + + iommus = <&apps_smmu 0x900 0x402>; + +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0008_arm64_dts_qcom_qcm2290_add_display_nodes.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0008_arm64_dts_qcom_qcm2290_add_display_nodes.patch new file mode 100644 index 0000000..577adb0 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0008_arm64_dts_qcom_qcm2290_add_display_nodes.patch @@ -0,0 +1,247 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qcm2290: Add display nodes +Date: Wed, 29 Nov 2023 15:44:05 +0100 + +Add the required nodes to support display on QCM2290. + +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git a2b32096709dbf4af02675d98356a9d3ad86ff05] +--- + arch/arm64/boot/dts/qcom/qcm2290.dtsi | 214 ++++++++++++++++++++++++++++++++++ + 1 file changed, 214 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +index d46e591e72b5..a3edc4667cc5 100644 +--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi ++++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +@@ -5,6 +5,7 @@ + * Based on sm6115.dtsi and previous efforts by Shawn Guo & Loic Poulain. + */ + ++#include <dt-bindings/clock/qcom,dispcc-qcm2290.h> + #include <dt-bindings/clock/qcom,gcc-qcm2290.h> + #include <dt-bindings/clock/qcom,rpmcc.h> + #include <dt-bindings/dma/qcom-gpi.h> +@@ -1105,6 +1106,219 @@ usb_dwc3: usb@4e00000 { + }; + }; + ++ mdss: display-subsystem@5e00000 { ++ compatible = "qcom,qcm2290-mdss"; ++ reg = <0x0 0x05e00000 0x0 0x1000>; ++ reg-names = "mdss"; ++ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ clocks = <&gcc GCC_DISP_AHB_CLK>, ++ <&gcc GCC_DISP_HF_AXI_CLK>, ++ <&dispcc DISP_CC_MDSS_MDP_CLK>; ++ clock-names = "iface", ++ "bus", ++ "core"; ++ ++ resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; ++ ++ power-domains = <&dispcc MDSS_GDSC>; ++ ++ iommus = <&apps_smmu 0x420 0x2>, ++ <&apps_smmu 0x421 0x0>; ++ ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ status = "disabled"; ++ ++ mdp: display-controller@5e01000 { ++ compatible = "qcom,qcm2290-dpu"; ++ reg = <0x0 0x05e01000 0x0 0x8f000>, ++ <0x0 0x05eb0000 0x0 0x2008>; ++ reg-names = "mdp", ++ "vbif"; ++ ++ interrupt-parent = <&mdss>; ++ interrupts = <0>; ++ ++ clocks = <&gcc GCC_DISP_HF_AXI_CLK>, ++ <&dispcc DISP_CC_MDSS_AHB_CLK>, ++ <&dispcc DISP_CC_MDSS_MDP_CLK>, ++ <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, ++ <&dispcc DISP_CC_MDSS_VSYNC_CLK>; ++ clock-names = "bus", ++ "iface", ++ "core", ++ "lut", ++ "vsync"; ++ ++ operating-points-v2 = <&mdp_opp_table>; ++ power-domains = <&rpmpd QCM2290_VDDCX>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ dpu_intf1_out: endpoint { ++ remote-endpoint = <&mdss_dsi0_in>; ++ }; ++ }; ++ }; ++ ++ mdp_opp_table: opp-table { ++ compatible = "operating-points-v2"; ++ ++ opp-19200000 { ++ opp-hz = /bits/ 64 <19200000>; ++ required-opps = <&rpmpd_opp_min_svs>; ++ }; ++ ++ opp-192000000 { ++ opp-hz = /bits/ 64 <192000000>; ++ required-opps = <&rpmpd_opp_low_svs>; ++ }; ++ ++ opp-256000000 { ++ opp-hz = /bits/ 64 <256000000>; ++ required-opps = <&rpmpd_opp_svs>; ++ }; ++ ++ opp-307200000 { ++ opp-hz = /bits/ 64 <307200000>; ++ required-opps = <&rpmpd_opp_svs_plus>; ++ }; ++ ++ opp-384000000 { ++ opp-hz = /bits/ 64 <384000000>; ++ required-opps = <&rpmpd_opp_nom>; ++ }; ++ }; ++ }; ++ ++ mdss_dsi0: dsi@5e94000 { ++ compatible = "qcom,qcm2290-dsi-ctrl", "qcom,mdss-dsi-ctrl"; ++ reg = <0x0 0x05e94000 0x0 0x400>; ++ reg-names = "dsi_ctrl"; ++ ++ interrupt-parent = <&mdss>; ++ interrupts = <4>; ++ ++ clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, ++ <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, ++ <&dispcc DISP_CC_MDSS_PCLK0_CLK>, ++ <&dispcc DISP_CC_MDSS_ESC0_CLK>, ++ <&dispcc DISP_CC_MDSS_AHB_CLK>, ++ <&gcc GCC_DISP_HF_AXI_CLK>; ++ clock-names = "byte", ++ "byte_intf", ++ "pixel", ++ "core", ++ "iface", ++ "bus"; ++ ++ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, ++ <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; ++ assigned-clock-parents = <&mdss_dsi0_phy 0>, ++ <&mdss_dsi0_phy 1>; ++ ++ operating-points-v2 = <&dsi_opp_table>; ++ power-domains = <&rpmpd QCM2290_VDDCX>; ++ phys = <&mdss_dsi0_phy>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ status = "disabled"; ++ ++ dsi_opp_table: opp-table { ++ compatible = "operating-points-v2"; ++ ++ opp-19200000 { ++ opp-hz = /bits/ 64 <19200000>; ++ required-opps = <&rpmpd_opp_min_svs>; ++ }; ++ ++ opp-164000000 { ++ opp-hz = /bits/ 64 <164000000>; ++ required-opps = <&rpmpd_opp_low_svs>; ++ }; ++ ++ opp-187500000 { ++ opp-hz = /bits/ 64 <187500000>; ++ required-opps = <&rpmpd_opp_svs>; ++ }; ++ }; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ mdss_dsi0_in: endpoint { ++ remote-endpoint = <&dpu_intf1_out>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ ++ mdss_dsi0_out: endpoint { ++ }; ++ }; ++ }; ++ }; ++ ++ mdss_dsi0_phy: phy@5e94400 { ++ compatible = "qcom,dsi-phy-14nm-2290"; ++ reg = <0x0 0x05e94400 0x0 0x100>, ++ <0x0 0x05e94500 0x0 0x300>, ++ <0x0 0x05e94800 0x0 0x188>; ++ reg-names = "dsi_phy", ++ "dsi_phy_lane", ++ "dsi_pll"; ++ ++ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, ++ <&rpmcc RPM_SMD_XO_CLK_SRC>; ++ clock-names = "iface", ++ "ref"; ++ ++ power-domains = <&rpmpd QCM2290_VDDMX>; ++ required-opps = <&rpmpd_opp_nom>; ++ ++ #clock-cells = <1>; ++ #phy-cells = <0>; ++ ++ status = "disabled"; ++ }; ++ }; ++ ++ dispcc: clock-controller@5f00000 { ++ compatible = "qcom,qcm2290-dispcc"; ++ reg = <0x0 0x05f00000 0x0 0x20000>; ++ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, ++ <&rpmcc RPM_SMD_XO_A_CLK_SRC>, ++ <&gcc GCC_DISP_GPLL0_CLK_SRC>, ++ <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>, ++ <&mdss_dsi0_phy 0>, ++ <&mdss_dsi0_phy 1>; ++ clock-names = "bi_tcxo", ++ "bi_tcxo_ao", ++ "gcc_disp_gpll0_clk_src", ++ "gcc_disp_gpll0_div_clk_src", ++ "dsi0_phy_pll_out_byteclk", ++ "dsi0_phy_pll_out_dsiclk"; ++ #power-domain-cells = <1>; ++ #clock-cells = <1>; ++ #reset-cells = <1>; ++ }; ++ + remoteproc_mpss: remoteproc@6080000 { + compatible = "qcom,qcm2290-mpss-pas", "qcom,sm6115-mpss-pas"; + reg = <0x0 0x06080000 0x0 0x100>; +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0009_arm64_dts_qcom_qcm2290_hook_up_interconnects.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0009_arm64_dts_qcom_qcm2290_hook_up_interconnects.patch new file mode 100644 index 0000000..69fb618 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0009_arm64_dts_qcom_qcm2290_hook_up_interconnects.patch @@ -0,0 +1,448 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qcm2290: Hook up interconnects +Date: Wed, 29 Nov 2023 15:44:06 +0100 + +Add interconnect provider nodes and hook up interconnects to consumer +devices, including bwmon. + +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 5b970ff0193d67da4a8d2d5fda50dd8ddb50a71e] +--- + arch/arm64/boot/dts/qcom/qcm2290.dtsi | 248 ++++++++++++++++++++++++++++++++++ + 1 file changed, 248 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +index a3edc4667cc5..ce04d0acdede 100644 +--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi ++++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +@@ -12,6 +12,8 @@ + #include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> ++#include <dt-bindings/interconnect/qcom,qcm2290.h> ++#include <dt-bindings/interconnect/qcom,rpm-icc.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + / { +@@ -151,6 +153,8 @@ scm: scm { + clocks = <&rpmcc RPM_SMD_CE1_CLK>; + clock-names = "core"; + #reset-cells = <1>; ++ interconnects = <&system_noc MASTER_CRYPTO_CORE0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; + }; + }; + +@@ -669,6 +673,33 @@ usb_qmpphy: phy@1615000 { + status = "disabled"; + }; + ++ system_noc: interconnect@1880000 { ++ compatible = "qcom,qcm2290-snoc"; ++ reg = <0x0 0x01880000 0x0 0x60200>; ++ #interconnect-cells = <2>; ++ ++ qup_virt: interconnect-qup { ++ compatible = "qcom,qcm2290-qup-virt"; ++ #interconnect-cells = <2>; ++ }; ++ ++ mmnrt_virt: interconnect-mmnrt { ++ compatible = "qcom,qcm2290-mmnrt-virt"; ++ #interconnect-cells = <2>; ++ }; ++ ++ mmrt_virt: interconnect-mmrt { ++ compatible = "qcom,qcm2290-mmrt-virt"; ++ #interconnect-cells = <2>; ++ }; ++ }; ++ ++ config_noc: interconnect@1900000 { ++ compatible = "qcom,qcm2290-cnoc"; ++ reg = <0x0 0x01900000 0x0 0x8200>; ++ #interconnect-cells = <2>; ++ }; ++ + qfprom@1b44000 { + compatible = "qcom,qcm2290-qfprom", "qcom,qfprom"; + reg = <0x0 0x01b44000 0x0 0x3000>; +@@ -681,6 +712,60 @@ qusb2_hstx_trim: hstx-trim@25b { + }; + }; + ++ pmu@1b8e300 { ++ compatible = "qcom,qcm2290-cpu-bwmon", "qcom,sdm845-bwmon"; ++ reg = <0x0 0x01b8e300 0x0 0x600>; ++ interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>; ++ ++ operating-points-v2 = <&cpu_bwmon_opp_table>; ++ interconnects = <&bimc MASTER_APPSS_PROC RPM_ACTIVE_TAG ++ &bimc SLAVE_EBI1 RPM_ACTIVE_TAG>; ++ ++ cpu_bwmon_opp_table: opp-table { ++ compatible = "operating-points-v2"; ++ ++ opp-0 { ++ opp-peak-kBps = <(200 * 4 * 1000)>; ++ }; ++ ++ opp-1 { ++ opp-peak-kBps = <(300 * 4 * 1000)>; ++ }; ++ ++ opp-2 { ++ opp-peak-kBps = <(451 * 4 * 1000)>; ++ }; ++ ++ opp-3 { ++ opp-peak-kBps = <(547 * 4 * 1000)>; ++ }; ++ ++ opp-4 { ++ opp-peak-kBps = <(681 * 4 * 1000)>; ++ }; ++ ++ opp-5 { ++ opp-peak-kBps = <(768 * 4 * 1000)>; ++ }; ++ ++ opp-6 { ++ opp-peak-kBps = <(1017 * 4 * 1000)>; ++ }; ++ ++ opp-7 { ++ opp-peak-kBps = <(1353 * 4 * 1000)>; ++ }; ++ ++ opp-8 { ++ opp-peak-kBps = <(1555 * 4 * 1000)>; ++ }; ++ ++ opp-9 { ++ opp-peak-kBps = <(1804 * 4 * 1000)>; ++ }; ++ }; ++ }; ++ + spmi_bus: spmi@1c40000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x0 0x01c40000 0x0 0x1100>, +@@ -721,6 +806,12 @@ rng: rng@4453000 { + clock-names = "core"; + }; + ++ bimc: interconnect@4480000 { ++ compatible = "qcom,qcm2290-bimc"; ++ reg = <0x0 0x04480000 0x0 0x80000>; ++ #interconnect-cells = <2>; ++ }; ++ + rpm_msg_ram: sram@45f0000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0x0 0x045f0000 0x0 0x7000>; +@@ -756,13 +847,45 @@ sdhc_1: mmc@4744000 { + resets = <&gcc GCC_SDCC1_BCR>; + + power-domains = <&rpmpd QCM2290_VDDCX>; ++ operating-points-v2 = <&sdhc1_opp_table>; + iommus = <&apps_smmu 0xc0 0x0>; ++ interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_SDCC_1 RPM_ALWAYS_TAG>; ++ interconnect-names = "sdhc-ddr", ++ "cpu-sdhc"; + + qcom,dll-config = <0x000f642c>; + qcom,ddr-config = <0x80040868>; + bus-width = <8>; + + status = "disabled"; ++ ++ sdhc1_opp_table: opp-table { ++ compatible = "operating-points-v2"; ++ ++ opp-100000000 { ++ opp-hz = /bits/ 64 <100000000>; ++ required-opps = <&rpmpd_opp_low_svs>; ++ opp-peak-kBps = <250000 133320>; ++ opp-avg-kBps = <102400 65000>; ++ }; ++ ++ opp-192000000 { ++ opp-hz = /bits/ 64 <192000000>; ++ required-opps = <&rpmpd_opp_low_svs>; ++ opp-peak-kBps = <800000 300000>; ++ opp-avg-kBps = <204800 200000>; ++ }; ++ ++ opp-384000000 { ++ opp-hz = /bits/ 64 <384000000>; ++ required-opps = <&rpmpd_opp_svs_plus>; ++ opp-peak-kBps = <800000 300000>; ++ opp-avg-kBps = <204800 200000>; ++ }; ++ }; + }; + + sdhc_2: mmc@4784000 { +@@ -786,6 +909,12 @@ sdhc_2: mmc@4784000 { + power-domains = <&rpmpd QCM2290_VDDCX>; + operating-points-v2 = <&sdhc2_opp_table>; + iommus = <&apps_smmu 0xa0 0x0>; ++ interconnects = <&system_noc MASTER_SDCC_2 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_SDCC_2 RPM_ALWAYS_TAG>; ++ interconnect-names = "sdhc-ddr", ++ "cpu-sdhc"; + + qcom,dll-config = <0x0007642c>; + qcom,ddr-config = <0x80040868>; +@@ -799,11 +928,15 @@ sdhc2_opp_table: opp-table { + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmpd_opp_low_svs>; ++ opp-peak-kBps = <250000 133320>; ++ opp-avg-kBps = <261438 150000>; + }; + + opp-202000000 { + opp-hz = /bits/ 64 <202000000>; + required-opps = <&rpmpd_opp_svs_plus>; ++ opp-peak-kBps = <800000 300000>; ++ opp-avg-kBps = <261438 300000>; + }; + }; + }; +@@ -851,6 +984,15 @@ i2c0: i2c@4a80000 { + dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, + <&gpi_dma0 1 0 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -867,6 +1009,12 @@ spi0: spi@4a80000 { + dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, + <&gpi_dma0 1 0 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -880,6 +1028,12 @@ uart0: serial@4a80000 { + clock-names = "se"; + pinctrl-0 = <&qup_uart0_default>; + pinctrl-names = "default"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + status = "disabled"; + }; + +@@ -894,6 +1048,15 @@ i2c1: i2c@4a84000 { + dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, + <&gpi_dma0 1 1 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -910,6 +1073,12 @@ spi1: spi@4a84000 { + dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, + <&gpi_dma0 1 1 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -926,6 +1095,15 @@ i2c2: i2c@4a88000 { + dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, + <&gpi_dma0 1 2 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -942,6 +1120,12 @@ spi2: spi@4a88000 { + dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, + <&gpi_dma0 1 2 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -958,6 +1142,15 @@ i2c3: i2c@4a8c000 { + dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, + <&gpi_dma0 1 3 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -974,6 +1167,12 @@ spi3: spi@4a8c000 { + dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, + <&gpi_dma0 1 3 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -990,6 +1189,15 @@ i2c4: i2c@4a90000 { + dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, + <&gpi_dma0 1 4 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1006,6 +1214,12 @@ spi4: spi@4a90000 { + dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, + <&gpi_dma0 1 4 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1019,6 +1233,12 @@ uart4: serial@4a90000 { + clock-names = "se"; + pinctrl-0 = <&qup_uart4_default>; + pinctrl-names = "default"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + status = "disabled"; + }; + +@@ -1033,6 +1253,15 @@ i2c5: i2c@4a94000 { + dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, + <&gpi_dma0 1 5 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1049,6 +1278,12 @@ spi5: spi@4a94000 { + dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, + <&gpi_dma0 1 5 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1081,6 +1316,13 @@ usb: usb@4ef8800 { + + resets = <&gcc GCC_USB30_PRIM_BCR>; + power-domains = <&gcc GCC_USB30_PRIM_GDSC>; ++ /* TODO: USB<->IPA path */ ++ interconnects = <&system_noc MASTER_USB3_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_USB3 RPM_ALWAYS_TAG>; ++ interconnect-names = "usb-ddr", ++ "apps-usb"; + wakeup-source; + + #address-cells = <2>; +@@ -1127,6 +1369,12 @@ mdss: display-subsystem@5e00000 { + + iommus = <&apps_smmu 0x420 0x2>, + <&apps_smmu 0x421 0x0>; ++ interconnects = <&mmrt_virt MASTER_MDP0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_DISPLAY_CFG RPM_ALWAYS_TAG>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; + + #address-cells = <2>; + #size-cells = <2>; +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0010_arm64_dts_qcom_qrb2210_rb1_set_up_hdmi.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0010_arm64_dts_qcom_qrb2210_rb1_set_up_hdmi.patch new file mode 100644 index 0000000..d202ef7 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0010_arm64_dts_qcom_qrb2210_rb1_set_up_hdmi.patch @@ -0,0 +1,126 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qrb2210-rb1: Set up HDMI +Date: Wed, 29 Nov 2023 15:44:07 +0100 + +Add the required nodes to support display output via the HDMI port. + +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 616eda24edd48b8b56516886c51d211fbfd2679b] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 86 ++++++++++++++++++++++++++++++++ + 1 file changed, 86 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index 94885b9c21c8..ac6584164058 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -40,6 +40,17 @@ key-volume-up { + }; + }; + ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_con: endpoint { ++ remote-endpoint = <<9611_out>; ++ }; ++ }; ++ }; ++ + leds { + compatible = "gpio-leds"; + +@@ -158,6 +169,68 @@ vph_pwr: regulator-vph-pwr { + }; + }; + ++&gpi_dma0 { ++ status = "okay"; ++}; ++ ++&i2c2 { ++ clock-frequency = <400000>; ++ status = "okay"; ++ ++ lt9611_codec: hdmi-bridge@2b { ++ compatible = "lontium,lt9611uxc"; ++ reg = <0x2b>; ++ interrupts-extended = <&tlmm 46 IRQ_TYPE_EDGE_FALLING>; ++ reset-gpios = <&tlmm 41 GPIO_ACTIVE_HIGH>; ++ ++ vdd-supply = <&vreg_hdmi_out_1p2>; ++ vcc-supply = <<9611_3v3>; ++ ++ pinctrl-0 = <<9611_irq_pin <9611_rst_pin>; ++ pinctrl-names = "default"; ++ #sound-dai-cells = <1>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ lt9611_a: endpoint { ++ remote-endpoint = <&mdss_dsi0_out>; ++ }; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ ++ lt9611_out: endpoint { ++ remote-endpoint = <&hdmi_con>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&mdss { ++ status = "okay"; ++}; ++ ++&mdss_dsi0 { ++ vdda-supply = <&pm2250_l5>; ++ status = "okay"; ++}; ++ ++&mdss_dsi0_out { ++ remote-endpoint = <<9611_a>; ++ data-lanes = <0 1 2 3>; ++}; ++ ++&mdss_dsi0_phy { ++ status = "okay"; ++}; ++ + &pm2250_resin { + linux,code = <KEY_VOLUMEDOWN>; + status = "okay"; +@@ -377,6 +450,19 @@ &sdhc_2 { + }; + + &tlmm { ++ lt9611_rst_pin: lt9611-rst-state { ++ pins = "gpio41"; ++ function = "gpio"; ++ input-disable; ++ output-high; ++ }; ++ ++ lt9611_irq_pin: lt9611-irq-state { ++ pins = "gpio46"; ++ function = "gpio"; ++ bias-disable; ++ }; ++ + sd_det_in_on: sd-det-in-on-state { + pins = "gpio88"; + function = "gpio"; +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0011_arm64_dts_qcom_qrb2210_rb1_enable_can_bus_controller.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0011_arm64_dts_qcom_qrb2210_rb1_enable_can_bus_controller.patch new file mode 100644 index 0000000..485ec79 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0011_arm64_dts_qcom_qrb2210_rb1_enable_can_bus_controller.patch @@ -0,0 +1,54 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qrb2210-rb1: Enable CAN bus controller +Date: Wed, 29 Nov 2023 15:44:08 +0100 + +Enable the Microchip mcp2518fd hosted on the SPI5 bus. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 252bc7ad359478dba8d77bce9502f2cc7bb547a3] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index ac6584164058..ac597eb3fe9d 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -23,6 +23,14 @@ chosen { + stdout-path = "serial0:115200n8"; + }; + ++ clocks { ++ clk40M: can-clk { ++ compatible = "fixed-clock"; ++ clock-frequency = <40000000>; ++ #clock-cells = <0>; ++ }; ++ }; ++ + gpio-keys { + compatible = "gpio-keys"; + label = "gpio-keys"; +@@ -449,6 +457,20 @@ &sdhc_2 { + status = "okay"; + }; + ++&spi5 { ++ status = "okay"; ++ ++ can@0 { ++ compatible = "microchip,mcp2518fd"; ++ reg = <0>; ++ interrupts-extended = <&tlmm 39 IRQ_TYPE_LEVEL_LOW>; ++ clocks = <&clk40M>; ++ spi-max-frequency = <10000000>; ++ vdd-supply = <&vdc_5v>; ++ xceiver-supply = <&vdc_5v>; ++ }; ++}; ++ + &tlmm { + lt9611_rst_pin: lt9611-rst-state { + pins = "gpio41"; +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0012_arm64_dts_qcom_qrb2210_rb1_add_wifi_variant_property.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0012_arm64_dts_qcom_qrb2210_rb1_add_wifi_variant_property.patch new file mode 100644 index 0000000..4c5d177 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0012_arm64_dts_qcom_qrb2210_rb1_add_wifi_variant_property.patch @@ -0,0 +1,47 @@ +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Subject: arm64: dts: qcom: qrb2210-rb1: add wifi variant property +Date: Wed, 29 Nov 2023 15:44:09 +0100 + +The RB1 platform doesn't have board-specific board-id programmed, it uses +generic 0xff. Thus add the property with the 'variant' of the +calibration data. + +Note: the driver will check for the calibration data for the following +IDs, so existing board-2.bin files will continue to work. + +- 'bus=snoc,qmi-board-id=ff,qmi-chip-id=120,variant=Thundercomm_RB1' +- 'bus=snoc,qmi-board-id=ff,qmi-chip-id=120' +- 'bus=snoc,qmi-board-id=ff' + +For the reference, the board is identified by the driver in the +following way: + +ath10k_snoc c800000.wifi: qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000 +ath10k_snoc c800000.wifi: qmi fw_version 0x337302d3 fw_build_timestamp 2023-01-06 01:50 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.3.7.c2-00723-QCAHLSWMTPLZ-1 +ath10k_snoc c800000.wifi: wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000 +ath10k_snoc c800000.wifi: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0 +ath10k_snoc c800000.wifi: firmware ver api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790 +ath10k_snoc c800000.wifi: htt-ver 3.114 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1 + +Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git b6a56a5a25d6273729b2b5139d58e3d390318ed2] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index ac597eb3fe9d..bd7bcf803654 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -535,6 +535,7 @@ &wifi { + vdd-1.8-xo-supply = <&pm2250_l13>; + vdd-1.3-rfa-supply = <&pm2250_l10>; + vdd-3.3-ch0-supply = <&pm2250_l22>; ++ qcom,ath10k-calibration-variant = "Thundercomm_RB1"; + status = "okay"; + }; + +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0001-arm64-dts-qcom-qrb2210-rb1-use-USB-host-mode.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0001-arm64-dts-qcom-qrb2210-rb1-use-USB-host-mode.patch new file mode 100644 index 0000000..4765451 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0001-arm64-dts-qcom-qrb2210-rb1-use-USB-host-mode.patch @@ -0,0 +1,41 @@ +From e0cee8dc6757f9f18718eec553be9fffa503e103 Mon Sep 17 00:00:00 2001 +From: Caleb Connolly <caleb.connolly@linaro.org> +Date: Wed, 25 Oct 2023 12:58:00 +0100 +Subject: [PATCH] arm64: dts: qcom: qrb2210-rb1: use USB host mode + +The default for the QCM2290 platform that this board is based on is OTG +mode, however the role detection logic is not hooked up for this board +and the dwc3 driver is configured to not allow role switching from +userspace. + +Force this board to host mode as this is the preferred usecase until we +get role switching hooked up. + +Fixes: e18771961336 ("arm64: dts: qcom: Add initial QTI RB1 device tree") +Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> +Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231025-b4-rb1-usb-host-v1-1-522616c575ef@linaro.org +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git e0cee8dc6757f9f18718eec553be9fffa503e103] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index bd7bcf803654..aa53b6af6d9c 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -523,6 +523,10 @@ &usb_qmpphy { + status = "okay"; + }; + ++&usb_dwc3 { ++ dr_mode = "host"; ++}; ++ + &usb_hsphy { + vdd-supply = <&pm2250_l12>; + vdda-pll-supply = <&pm2250_l13>; +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0003_arm64_dts_qcom_qrb2210_rb1_enable_remote_processors.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0003_arm64_dts_qcom_qrb2210_rb1_enable_remote_processors.patch new file mode 100644 index 0000000..8161c44 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0003_arm64_dts_qcom_qrb2210_rb1_enable_remote_processors.patch @@ -0,0 +1,55 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qrb2210-rb1: Enable remote processors +Date: Wed, 06 Sep 2023 11:24:57 +0200 + +Enable the ADSP, MPSS and Wi-Fi. Tighten up the Wi-Fi regulators to +make them compliant with that the chip expects. + +The Wi-Fi reports: +qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000 + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 9692ccc49583cd43184ea192af127635877e0f24] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index 0f7c59187896..5f7619518deb 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -134,6 +134,16 @@ &qupv3_id_0 { + status = "okay"; + }; + ++&remoteproc_adsp { ++ firmware-name = "qcom/qcm2290/adsp.mbn"; ++ status = "okay"; ++}; ++ ++&remoteproc_mpss { ++ firmware-name = "qcom/qcm2290/modem.mbn"; ++ status = "okay"; ++}; ++ + &rpm_requests { + regulators { + compatible = "qcom,rpm-pm2250-regulators"; +@@ -373,6 +383,14 @@ &usb_hsphy { + status = "okay"; + }; + ++&wifi { ++ vdd-0.8-cx-mx-supply = <&pm2250_l7>; ++ vdd-1.8-xo-supply = <&pm2250_l13>; ++ vdd-1.3-rfa-supply = <&pm2250_l10>; ++ vdd-3.3-ch0-supply = <&pm2250_l22>; ++ status = "okay"; ++}; ++ + &xo_board { + clock-frequency = <38400000>; + }; +-- +2.42.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0004_arm64_dts_qcom_qrb2210_rb1_add_gpio_leds.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0004_arm64_dts_qcom_qrb2210_rb1_add_gpio_leds.patch new file mode 100644 index 0000000..933d410 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0004_arm64_dts_qcom_qrb2210_rb1_add_gpio_leds.patch @@ -0,0 +1,65 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qrb2210-rb1: Add GPIO LEDs +Date: Wed, 06 Sep 2023 11:24:58 +0200 + +Add the three LEDs (blue/yellow/green) connected to TLMM GPIOs. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 02a2fcfbb835bac0c523b3f89326bc1c69f83ce0] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 33 ++++++++++++++++++++++++++++++++ + 1 file changed, 33 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index 5f7619518deb..fd45f58e254d 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -5,6 +5,7 @@ + + /dts-v1/; + ++#include <dt-bindings/leds/common.h> + #include "qcm2290.dtsi" + #include "pm2250.dtsi" + +@@ -39,6 +40,38 @@ key-volume-up { + }; + }; + ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-bt { ++ label = "blue:bt"; ++ function = LED_FUNCTION_BLUETOOTH; ++ color = <LED_COLOR_ID_BLUE>; ++ gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "bluetooth-power"; ++ default-state = "off"; ++ }; ++ ++ led-user0 { ++ label = "green:user0"; ++ function = LED_FUNCTION_INDICATOR; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "none"; ++ default-state = "off"; ++ panic-indicator; ++ }; ++ ++ led-wlan { ++ label = "yellow:wlan"; ++ function = LED_FUNCTION_WLAN; ++ color = <LED_COLOR_ID_YELLOW>; ++ gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "phy0tx"; ++ default-state = "off"; ++ }; ++ }; ++ + vreg_hdmi_out_1p2: regulator-hdmi-out-1p2 { + compatible = "regulator-fixed"; + regulator-name = "VREG_HDMI_OUT_1P2"; +-- +2.42.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0005_arm64_dts_qcom_qrb2210_rb1_hook_up_usb3.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0005_arm64_dts_qcom_qrb2210_rb1_hook_up_usb3.patch new file mode 100644 index 0000000..6f93da3 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0005_arm64_dts_qcom_qrb2210_rb1_hook_up_usb3.patch @@ -0,0 +1,32 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qrb2210-rb1: Hook up USB3 +Date: Wed, 06 Sep 2023 11:24:59 +0200 + +Configure the USB3 PHY to enable USB3 functionality + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 59f9ff79cd9cf3bc10743d61662b5729fcffff24] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index fd45f58e254d..94885b9c21c8 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -409,6 +409,12 @@ &usb { + status = "okay"; + }; + ++&usb_qmpphy { ++ vdda-phy-supply = <&pm2250_l12>; ++ vdda-pll-supply = <&pm2250_l13>; ++ status = "okay"; ++}; ++ + &usb_hsphy { + vdd-supply = <&pm2250_l12>; + vdda-pll-supply = <&pm2250_l13>; +-- +2.42.0 |