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Upstream-Status: Backport [e3c152d1156af8a4b6453376454ecdceaf81704c]
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
From e3c152d1156af8a4b6453376454ecdceaf81704c Mon Sep 17 00:00:00 2001
From: lakshmi Kailasanathan <lakshmi.Kailasanathan@arm.com>
Date: Fri, 17 Apr 2020 12:52:19 +0100
Subject: [PATCH] fdts: a5ds: Fix for the system timer issue.
A5DS FPGA system timer clock frequency is 7.5Mhz.
The dt is file updated inline with the hardware
clock frequency.
Change-Id: I3f6c2e0d4a7b293175a42cf398a8730448504af9
Signed-off-by: lakshmi Kailasanathan <lakshmi.Kailasanathan@arm.com>
---
fdts/a5ds.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fdts/a5ds.dts b/fdts/a5ds.dts
index 7334c4559..c6f5be6fa 100644
--- a/fdts/a5ds.dts
+++ b/fdts/a5ds.dts
@@ -128,7 +128,7 @@
#size-cells = <1>;
ranges;
reg = <0x1a040000 0x1000>;
- clock-frequency = <50000000>;
+ clock-frequency = <7500000>;
frame@1a050000 {
frame-number = <0>;
--
2.17.1
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