blob: 0d7d4da00404338152f080462cfbdbc1da98e972 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
|
From c0102384042b1e313721af0ebe1dbf7bf3dd6bde Mon Sep 17 00:00:00 2001
From: Leo Li <sunpeng.li@amd.com>
Date: Tue, 16 Jul 2019 11:50:06 -0400
Subject: [PATCH 3298/4256] drm/amd/display: Add ASICREV_IS_NAVI macros
They are used by DC to determine ASIC revs.
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/include/dal_asic_id.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
index 54e9246f3f82..cb9b1873f947 100644
--- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h
+++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
@@ -151,11 +151,13 @@
enum {
NV_NAVI10_P_A0 = 1,
+ NV_NAVI12_P_A0 = 10,
NV_NAVI14_M_A0 = 20,
NV_UNKNOWN = 0xFF
};
-#define ASICREV_IS_NAVI10_P(eChipRev) (eChipRev < NV_NAVI14_M_A0)
+#define ASICREV_IS_NAVI10_P(eChipRev) (eChipRev < NV_NAVI12_P_A0)
+#define ASICREV_IS_NAVI12_P(eChipRev) ((eChipRev >= NV_NAVI12_P_A0) && (eChipRev < NV_NAVI14_M_A0))
#define ASICREV_IS_NAVI14_M(eChipRev) ((eChipRev >= NV_NAVI14_M_A0) && (eChipRev < NV_UNKNOWN))
#endif
--
2.17.1
|
