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From 7b0bdcd2fe50b91b9fe79125620166f5107d051a Mon Sep 17 00:00:00 2001
From: Huang Rui <ray.huang@amd.com>
Date: Fri, 14 Jun 2019 16:19:36 +0800
Subject: [PATCH 2594/2940] drm/amd/powerplay: make athub pg bit configured by
pg_flags
The athub pg features enabling should be indicated by pg_flags.
Reported-by: Lijo Lazar <Lijo.Lazar@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 ++-
drivers/gpu/drm/amd/include/amd_shared.h | 3 ++-
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 4 +++-
3 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 38f086ade1e3..7b307b521c83 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -509,7 +509,8 @@ static int nv_common_early_init(void *handle)
AMD_CG_SUPPORT_BIF_LS;
adev->pg_flags = AMD_PG_SUPPORT_VCN |
AMD_PG_SUPPORT_VCN_DPG |
- AMD_PG_SUPPORT_MMHUB;
+ AMD_PG_SUPPORT_MMHUB |
+ AMD_PG_SUPPORT_ATHUB;
adev->external_rev_id = adev->rev_id + 0x1;
break;
default:
diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h
index 61fe4af4bd44..d352b8d76365 100644
--- a/drivers/gpu/drm/amd/include/amd_shared.h
+++ b/drivers/gpu/drm/amd/include/amd_shared.h
@@ -115,7 +115,8 @@ enum amd_powergating_state {
#define AMD_PG_SUPPORT_GFX_PIPELINE (1 << 12)
#define AMD_PG_SUPPORT_MMHUB (1 << 13)
#define AMD_PG_SUPPORT_VCN (1 << 14)
-#define AMD_PG_SUPPORT_VCN_DPG (1 << 15)
+#define AMD_PG_SUPPORT_VCN_DPG (1 << 15)
+#define AMD_PG_SUPPORT_ATHUB (1 << 16)
enum PP_FEATURE_MASK {
PP_SCLK_DPM_MASK = 0x1,
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index 928f870f556f..1c59a0f243ab 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -325,7 +325,6 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
| FEATURE_MASK(FEATURE_FAN_CONTROL_BIT)
| FEATURE_MASK(FEATURE_THERMAL_BIT)
| FEATURE_MASK(FEATURE_LED_DISPLAY_BIT)
- | FEATURE_MASK(FEATURE_ATHUB_PG_BIT)
| FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT)
| FEATURE_MASK(FEATURE_DS_GFXCLK_BIT)
| FEATURE_MASK(FEATURE_DS_DCEFCLK_BIT)
@@ -348,6 +347,9 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
if (smu->adev->pg_flags & AMD_PG_SUPPORT_MMHUB)
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MMHUB_PG_BIT);
+ if (smu->adev->pg_flags & AMD_PG_SUPPORT_ATHUB)
+ *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ATHUB_PG_BIT);
+
if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN)
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT);
--
2.17.1
|
