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From 16fbea94d200ca6aec7d4312db5b438102471afc Mon Sep 17 00:00:00 2001
From: Tao Zhou <tao.zhou1@amd.com>
Date: Tue, 14 May 2019 11:37:32 +0800
Subject: [PATCH 2375/2940] drm/amdgpu: correct reference clock value on navi10
remove the divisor 4
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Acked-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/nv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index d1f8757abbeb..70d844d06e20 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -122,7 +122,7 @@ static u32 nv_get_config_memsize(struct amdgpu_device *adev)
static u32 nv_get_xclk(struct amdgpu_device *adev)
{
- return adev->clock.spll.reference_freq / 4;
+ return adev->clock.spll.reference_freq;
}
--
2.17.1
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