1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
|
From 8bc9a67b35f59f29c85a6a7dc824b11668c529a7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
Date: Mon, 27 Aug 2018 15:17:59 -0500
Subject: [PATCH 0312/2940] drm/amdgpu: add helper for VM PD/PT allocation
parameters v3
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Add a helper function to figure them out only once.
v2: fix typo with memset
v3: rebase on kfd changes (Alex)
Change-Id: Idc7b0fdb3c8cf51b69818de83c6954665e8dfee2
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Kalyan Alle <kalyan.alle@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 37 +++-----------------------
1 file changed, 3 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 9fe324118aca..41c8c640ba23 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -535,8 +535,8 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
unsigned level, bool ats)
{
unsigned shift = amdgpu_vm_level_shift(adev, level);
+ struct amdgpu_bo_param bp;
unsigned pt_idx, from, to;
- u64 flags;
int r;
if (!parent->entries) {
@@ -559,30 +559,14 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
saddr = saddr & ((1 << shift) - 1);
eaddr = eaddr & ((1 << shift) - 1);
- flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
- if (vm->root.base.bo->shadow)
- flags |= AMDGPU_GEM_CREATE_SHADOW;
- if (vm->use_cpu_for_update)
- flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
- else
- flags |= AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
+ amdgpu_vm_bo_param(adev, vm, level, &bp);
/* walk over the address space and allocate the page tables */
for (pt_idx = from; pt_idx <= to; ++pt_idx) {
- struct reservation_object *resv = vm->root.base.bo->tbo.resv;
struct amdgpu_vm_pt *entry = &parent->entries[pt_idx];
struct amdgpu_bo *pt;
if (!entry->base.bo) {
- struct amdgpu_bo_param bp;
-
- memset(&bp, 0, sizeof(bp));
- bp.size = amdgpu_vm_bo_size(adev, level);
- bp.byte_align = AMDGPU_GPU_PAGE_SIZE;
- bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
- bp.flags = flags;
- bp.type = ttm_bo_type_kernel;
- bp.resv = resv;
r = amdgpu_bo_create(adev, &bp, &pt);
if (r)
return r;
@@ -2674,8 +2658,6 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
{
struct amdgpu_bo_param bp;
struct amdgpu_bo *root;
- unsigned long size;
- uint64_t flags;
int r, i;
vm->va = RB_ROOT_CACHED;
@@ -2712,20 +2694,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
"CPU update of VM recommended only for large BAR system\n");
vm->last_update = NULL;
- flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
- if (vm->use_cpu_for_update)
- flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
- else if (vm_context != AMDGPU_VM_CONTEXT_COMPUTE)
- flags |= AMDGPU_GEM_CREATE_SHADOW;
-
- size = amdgpu_vm_bo_size(adev, adev->vm_manager.root_level);
- memset(&bp, 0, sizeof(bp));
- bp.size = size;
- bp.byte_align = AMDGPU_GPU_PAGE_SIZE;
- bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
- bp.flags = flags;
- bp.type = ttm_bo_type_kernel;
- bp.resv = NULL;
+ amdgpu_vm_bo_param(adev, vm, adev->vm_manager.root_level, &bp);
r = amdgpu_bo_create(adev, &bp, &root);
if (r)
goto error_free_sched_entity;
--
2.17.1
|