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From 2ba3073f9533d303ff52d8cfa60599ead70163b9 Mon Sep 17 00:00:00 2001
From: Mauro Rossi <issor.oruam@gmail.com>
Date: Sun, 12 Aug 2018 21:43:01 +0200
Subject: [PATCH 5113/5725] drm/amd/display: enable ABGR and XBGR formats (v4)
SURFACE_PIXEL_FORMAT_GRPH_ABGR8888 is supported in amd/display/dc/dc_hw_types.h
and the necessary crossbars register controls to swap red and blue channels
are already implemented in drm/amd/display/dc/dce/dce_mem_input.c
(v4) Logic to handle new formats is added only in amdgpu_dm module.
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index d6d6568..3305d9d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2073,6 +2073,10 @@ static int fill_plane_attributes_from_fb(struct amdgpu_device *adev,
case DRM_FORMAT_ABGR2101010:
plane_state->format = SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010;
break;
+ case DRM_FORMAT_XBGR8888:
+ case DRM_FORMAT_ABGR8888:
+ plane_state->format = SURFACE_PIXEL_FORMAT_GRPH_ABGR8888;
+ break;
case DRM_FORMAT_NV21:
plane_state->format = SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr;
break;
@@ -3505,6 +3509,8 @@ static const uint32_t rgb_formats[] = {
DRM_FORMAT_XBGR2101010,
DRM_FORMAT_ARGB2101010,
DRM_FORMAT_ABGR2101010,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ABGR8888,
};
static const uint32_t yuv_formats[] = {
--
2.7.4
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