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From a63b674ee86e587d772f685fba30c5585045c6df Mon Sep 17 00:00:00 2001
From: Mikita Lipski <mikita.lipski@amd.com>
Date: Tue, 17 Oct 2017 15:29:22 -0400
Subject: [PATCH 3858/4131] drm/amd/display: Multi display synchronization
logic
This feature synchronizes multiple displays with various timings
to a display with the highest refresh rate
it is enabled if edid caps flag multi_display_sync is set to one
There are limitations on refresh rates allowed
that can be synchronized. That would
prevent from underflow and other potential
corruptions.
Multi display synchronization is using the
same functions as timing_sync in order to minimize
redunduncy and decision to disable synchronization is
based on trigger parametre set in DM
Feature is developed for DCN1 and DCE11
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 094b1c6..97cceb8 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2441,8 +2441,10 @@ static void dm_enable_per_frame_crtc_master_sync(struct dc_state *context)
for (i = 0; i < context->stream_count ; i++) {
if (!context->streams[i])
continue;
- context->streams[i]->triggered_crtc_reset.enabled =
- dm_helpers_parse_amd_vsdb((struct edid *) context->streams[i]->sink->dc_edid.raw_edid);
+ /* TODO: add a function to read AMD VSDB bits and will set
+ * crtc_sync_master.multi_sync_enabled flag
+ * For now its set to false
+ */
set_multisync_trigger_params(context->streams[i]);
}
set_master_stream(context->streams, context->stream_count);
--
2.7.4
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