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From 33472bde48f3ff51984247ab580415146cbd96c6 Mon Sep 17 00:00:00 2001
From: Jay Cornwall <Jay.Cornwall@amd.com>
Date: Fri, 5 Jan 2018 18:04:24 -0600
Subject: [PATCH 3131/4131] drm/amdkfd: Handle MEM_VIOL for halted wavefronts
A wavefront may raise MEM_VIOL if its PC points to an invalid
address. On first entry to the trap this will cause STATUS.HALT
to be set. However, this is insufficient to prevent subsequent
MEM_VIOL exceptions and re-entry to the trap handler.
If a wavefront raises MEM_VIOL and has already been halted then
terminate it.
Change-Id: Ib42fc5e0af56bde8028dff97a0b4e2eebdcb0c88
Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com>
---
drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm
index ae2af3d..81d7069 100644
--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm
@@ -250,6 +250,12 @@ if (!EMU_RUN_HACK)
s_cbranch_scc0 L_NO_MEM_VIOL
L_HALT_WAVE:
+ // If STATUS.HALT is set then this fault must come from SQC instruction fetch.
+ // We cannot prevent further faults so just terminate the wavefront.
+ s_and_b32 ttmp8, s_save_status, SQ_WAVE_STATUS_HALT_MASK
+ s_cbranch_scc0 L_NOT_ALREADY_HALTED
+ s_endpgm
+L_NOT_ALREADY_HALTED:
s_or_b32 s_save_status, s_save_status, SQ_WAVE_STATUS_HALT_MASK
s_branch L_EXCP_CASE
@@ -1139,13 +1145,15 @@ end
#endif
static const uint32_t cwsr_trap_gfx9_hex[] = {
- 0xbf820001, 0xbf820124,
+ 0xbf820001, 0xbf820128,
0xb8f0f802, 0x89708670,
0xb8f1f803, 0x8674ff71,
- 0x00000400, 0xbf85001d,
+ 0x00000400, 0xbf850021,
0x8674ff71, 0x00000800,
0xbf850003, 0x8674ff71,
- 0x00000100, 0xbf840003,
+ 0x00000100, 0xbf840007,
+ 0x8674ff70, 0x00002000,
+ 0xbf840001, 0xbf810000,
0x8770ff70, 0x00002000,
0xbf820010, 0xb8faf812,
0xb8fbf813, 0x8efa887a,
--
2.7.4
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