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From a8ad76a92c5826004c8f881355adf69c5e2f4d0e Mon Sep 17 00:00:00 2001
From: "Le.Ma" <Le.Ma@amd.com>
Date: Thu, 2 Nov 2017 14:02:10 +0800
Subject: [PATCH 2075/4131] Revert "drm/amdgpu: use multipipe compute policy on
non PL11 asics"
This reverts commit 78b33d8834dc8a751e1c0e7531aa7425b2a797b0.
Revert this commit because it causes oclperf and other ocl cases hung on Tonga.
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 1dae2c7..1a8dc93 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -109,20 +109,9 @@ void amdgpu_gfx_parse_disable_cu(unsigned *mask, unsigned max_se, unsigned max_s
}
}
-static bool amdgpu_gfx_is_multipipe_capable(struct amdgpu_device *adev)
-{
- /* FIXME: spreading the queues across pipes causes perf regressions
- * on POLARIS11 compute workloads */
- if (adev->asic_type == CHIP_POLARIS11)
- return false;
-
- return adev->gfx.mec.num_mec > 1;
-}
-
void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev)
{
int i, queue, pipe, mec;
- bool multipipe_policy = amdgpu_gfx_is_multipipe_capable(adev);
/* policy for amdgpu compute queue ownership */
for (i = 0; i < AMDGPU_MAX_COMPUTE_QUEUES; ++i) {
@@ -136,7 +125,8 @@ void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev)
if (mec >= adev->gfx.mec.num_mec)
break;
- if (multipipe_policy) {
+ /* FIXME: spreading the queues across pipes causes perf regressions */
+ if (0) {
/* policy: amdgpu owns the first two queues of the first MEC */
if (mec == 0 && queue < 2)
set_bit(i, adev->gfx.mec.queue_bitmap);
--
2.7.4
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