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From 35ffea4bd7f16afbe3d17275daad4f1fcce3bde9 Mon Sep 17 00:00:00 2001
From: Ken Wang <Ken.Wang@amd.com>
Date: Tue, 24 Oct 2017 12:26:05 +0800
Subject: [PATCH 1071/4131] drm/amdgpu: correct reference clock value on vega10
Change-Id: I568c5553e276c33c6db418412e663bf9f358e748
Signed-off-by: Ken Wang <Ken.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 29d8b82..f0c9904 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -279,9 +279,6 @@ static void soc15_init_golden_registers(struct amdgpu_device *adev)
}
static u32 soc15_get_xclk(struct amdgpu_device *adev)
{
- if (adev->asic_type == CHIP_VEGA10)
- return 27000;
- else
return adev->clock.spll.reference_freq;
}
--
2.7.4
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