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From 483d62aaddeb7e4a4f5ac4cc524c05681a829cc5 Mon Sep 17 00:00:00 2001
From: hersen wu <hersenxs.wu@amd.com>
Date: Sat, 1 Jun 2019 18:23:38 -0400
Subject: [PATCH 2458/2940] drm/amd/display/dc: fix azalia workaround sw
implementation bug
caller of pp_nv_set_pme_wa_enable pass incorrect pp_smu:
dc->res_pool->pp_smu. it should be dc->res_pool->pp_smu->nv_funcs.pp_smu.
with incorrect input, pp->dm = NULL. This causes system crash.
Signed-off-by: hersen wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index e7cc58ef6a5e..edda426e32b4 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -969,10 +969,10 @@ static void set_pme_wa_enable_by_version(struct dc *dc)
if (pp_smu) {
if (pp_smu->ctx.ver == PP_SMU_VER_RV && pp_smu->rv_funcs.set_pme_wa_enable)
- pp_smu->rv_funcs.set_pme_wa_enable(&(pp_smu->ctx));
+ pp_smu->rv_funcs.set_pme_wa_enable(&(pp_smu->rv_funcs.pp_smu));
#ifdef CONFIG_DRM_AMD_DC_DCN2_0
else if (pp_smu->ctx.ver == PP_SMU_VER_NV && pp_smu->nv_funcs.set_pme_wa_enable)
- pp_smu->nv_funcs.set_pme_wa_enable(&(pp_smu->ctx));
+ pp_smu->nv_funcs.set_pme_wa_enable(&(pp_smu->nv_funcs.pp_smu));
#endif
}
}
--
2.17.1
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