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From b6a1cf0319d9db3419901cb7bfdc38569011b377 Mon Sep 17 00:00:00 2001
From: Huang Rui <ray.huang@amd.com>
Date: Fri, 29 Mar 2019 17:52:11 +0800
Subject: [PATCH 2289/2940] drm/amd/powerplay: introduce smu table id type to
handle the smu table for each asic
This patch introduces new smu table type, it's to handle the different smu table
defines for each asic with the same smu ip.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
.../gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 20 +++++++++++++
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 3 ++
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 29 +++++++++++++++++++
drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 27 +++++++++++++++++
4 files changed, 79 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index f0b313baf04d..631e2fc1e055 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -366,6 +366,23 @@ struct smu_bios_boot_up_values
uint32_t pp_table_id;
};
+enum smu_table_id
+{
+ SMU_TABLE_PPTABLE = 0,
+ SMU_TABLE_WATERMARKS,
+ SMU_TABLE_AVFS,
+ SMU_TABLE_AVFS_PSM_DEBUG,
+ SMU_TABLE_AVFS_FUSE_OVERRIDE,
+ SMU_TABLE_PMSTATUSLOG,
+ SMU_TABLE_SMU_METRICS,
+ SMU_TABLE_DRIVER_SMU_CONFIG,
+ SMU_TABLE_ACTIVITY_MONITOR_COEFF,
+ SMU_TABLE_OVERDRIVE,
+ SMU_TABLE_I2C_COMMANDS,
+ SMU_TABLE_PACE,
+ SMU_TABLE_COUNT,
+};
+
struct smu_table_context
{
void *power_play_table;
@@ -495,6 +512,7 @@ struct pptable_funcs {
int (*get_smu_msg_index)(struct smu_context *smu, uint32_t index);
int (*get_smu_clk_index)(struct smu_context *smu, uint32_t index);
int (*get_smu_feature_index)(struct smu_context *smu, uint32_t index);
+ int (*get_smu_table_index)(struct smu_context *smu, uint32_t index);
int (*run_afll_btc)(struct smu_context *smu);
int (*get_allowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
enum amd_pm_state_type (*get_current_power_state)(struct smu_context *smu);
@@ -783,6 +801,8 @@ struct smu_funcs
((smu)->ppt_funcs? ((smu)->ppt_funcs->get_smu_clk_index? (smu)->ppt_funcs->get_smu_clk_index((smu), (msg)) : -EINVAL) : -EINVAL)
#define smu_feature_get_index(smu, msg) \
((smu)->ppt_funcs? ((smu)->ppt_funcs->get_smu_feature_index? (smu)->ppt_funcs->get_smu_feature_index((smu), (msg)) : -EINVAL) : -EINVAL)
+#define smu_table_get_index(smu, tab) \
+ ((smu)->ppt_funcs? ((smu)->ppt_funcs->get_smu_table_index? (smu)->ppt_funcs->get_smu_table_index((smu), (tab)) : -EINVAL) : -EINVAL)
#define smu_run_afll_btc(smu) \
((smu)->ppt_funcs? ((smu)->ppt_funcs->run_afll_btc? (smu)->ppt_funcs->run_afll_btc((smu)) : 0) : 0)
#define smu_get_allowed_feature_mask(smu, feature_mask, num) \
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
index 9284c1edfe42..dcc1ede97c04 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
@@ -46,6 +46,9 @@
#define FEA_MAP(fea) \
[SMU_FEATURE_##fea##_BIT] = FEATURE_##fea##_BIT
+#define TAB_MAP(tab) \
+ [SMU_TABLE_##tab] = TABLE_##tab
+
struct smu_11_0_max_sustainable_clocks {
uint32_t display_clock;
uint32_t phy_clock;
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index d1c2d4e67879..7c78251ed944 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -156,6 +156,21 @@ static int navi10_feature_mask_map[SMU_FEATURE_COUNT] = {
FEA_MAP(ATHUB_PG),
};
+static int navi10_table_map[SMU_TABLE_COUNT] = {
+ TAB_MAP(PPTABLE),
+ TAB_MAP(WATERMARKS),
+ TAB_MAP(AVFS),
+ TAB_MAP(AVFS_PSM_DEBUG),
+ TAB_MAP(AVFS_FUSE_OVERRIDE),
+ TAB_MAP(PMSTATUSLOG),
+ TAB_MAP(SMU_METRICS),
+ TAB_MAP(DRIVER_SMU_CONFIG),
+ TAB_MAP(ACTIVITY_MONITOR_COEFF),
+ TAB_MAP(OVERDRIVE),
+ TAB_MAP(I2C_COMMANDS),
+ TAB_MAP(PACE),
+};
+
static int navi10_get_smu_msg_index(struct smu_context *smc, uint32_t index)
{
int val;
@@ -195,6 +210,19 @@ static int navi10_get_smu_feature_index(struct smu_context *smc, uint32_t index)
return val;
}
+static int navi10_get_smu_table_index(struct smu_context *smc, uint32_t index)
+{
+ int val;
+ if (index >= SMU_TABLE_COUNT)
+ return -EINVAL;
+
+ val = navi10_table_map[index];
+ if (val >= TABLE_COUNT)
+ return -EINVAL;
+
+ return val;
+}
+
#define FEATURE_MASK(feature) (1UL << feature)
static int
navi10_get_allowed_feature_mask(struct smu_context *smu,
@@ -412,6 +440,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
.get_smu_msg_index = navi10_get_smu_msg_index,
.get_smu_clk_index = navi10_get_smu_clk_index,
.get_smu_feature_index = navi10_get_smu_feature_index,
+ .get_smu_table_index = navi10_get_smu_table_index,
.get_allowed_feature_mask = navi10_get_allowed_feature_mask,
.set_default_dpm_table = navi10_set_default_dpm_table,
};
diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
index 718fd4dec531..7cafbc942b2a 100644
--- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
@@ -189,6 +189,32 @@ static int vega20_feature_mask_map[SMU_FEATURE_COUNT] = {
FEA_MAP(XGMI),
};
+static int vega20_table_map[SMU_TABLE_COUNT] = {
+ TAB_MAP(PPTABLE),
+ TAB_MAP(WATERMARKS),
+ TAB_MAP(AVFS),
+ TAB_MAP(AVFS_PSM_DEBUG),
+ TAB_MAP(AVFS_FUSE_OVERRIDE),
+ TAB_MAP(PMSTATUSLOG),
+ TAB_MAP(SMU_METRICS),
+ TAB_MAP(DRIVER_SMU_CONFIG),
+ TAB_MAP(ACTIVITY_MONITOR_COEFF),
+ TAB_MAP(OVERDRIVE),
+};
+
+static int vega20_get_smu_table_index(struct smu_context *smc, uint32_t index)
+{
+ int val;
+ if (index >= SMU_TABLE_COUNT)
+ return -EINVAL;
+
+ val = vega20_table_map[index];
+ if (val >= TABLE_COUNT)
+ return -EINVAL;
+
+ return val;
+}
+
static int vega20_get_smu_feature_index(struct smu_context *smc, uint32_t index)
{
int val;
@@ -2925,6 +2951,7 @@ static const struct pptable_funcs vega20_ppt_funcs = {
.get_smu_msg_index = vega20_get_smu_msg_index,
.get_smu_clk_index = vega20_get_smu_clk_index,
.get_smu_feature_index = vega20_get_smu_feature_index,
+ .get_smu_table_index = vega20_get_smu_table_index,
.run_afll_btc = vega20_run_btc_afll,
.get_allowed_feature_mask = vega20_get_allowed_feature_mask,
.get_current_power_state = vega20_get_current_power_state,
--
2.17.1
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