blob: 654afd277ca0abe21d6981132617b3e2f59e6e4a (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
|
From 736f0ca94f45d4c9591617da6c872b53ad467e1b Mon Sep 17 00:00:00 2001
From: Huang Rui <ray.huang@amd.com>
Date: Wed, 5 Dec 2018 12:01:09 +0800
Subject: [PATCH 1350/2940] drm/amd/powerplay: add resume sequence placeholder
for smu ip block
This patch adds resume sequence placeholder for smu ip block.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 39 +++++++++++++++++++++-
1 file changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index e0a5597cf6c4..a6f19b525420 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -311,13 +311,50 @@ static int smu_resume(void *handle)
if (adev->asic_type < CHIP_VEGA20)
return -EINVAL;
+ pr_info("SMU is resuming...\n");
+
+ if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {
+ ret = smu_load_microcode(smu);
+ if (ret)
+ return ret;
+ }
+
+ ret = smu_check_fw_status(smu);
+ if (ret) {
+ pr_err("SMC firmware status is not correct\n");
+ return ret;
+ }
+
mutex_lock(&smu->mutex);
- /* TODO */
+ ret = smu_set_tool_table_location(smu);
+ if (ret)
+ goto failed;
+
+ ret = smu_write_pptable(smu);
+ if (ret)
+ goto failed;
+
+ ret = smu_write_watermarks_table(smu);
+ if (ret)
+ goto failed;
+
+ ret = smu_set_last_dcef_min_deep_sleep_clk(smu);
+ if (ret)
+ goto failed;
+
+ ret = smu_system_features_control(smu, true);
+ if (ret)
+ goto failed;
mutex_unlock(&smu->mutex);
+ pr_info("SMU is resumed successfully!\n");
+
return 0;
+failed:
+ mutex_unlock(&smu->mutex);
+ return ret;
}
static int smu_set_clockgating_state(void *handle,
--
2.17.1
|
