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From c07496d58c9eadfcbc413ef582f0a29524788b26 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sun, 13 Jan 2019 14:24:07 +0100
Subject: [PATCH 1101/2940] drm/amd/display: Include names of all PP clock
types
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This fixes printing clock names in cases like:
[ 5.352311] [drm] DM_PPLIB: values for Invalid clock
[ 5.352313] [drm] DM_PPLIB: 400000 in kHz
[ 5.352313] [drm] DM_PPLIB: 933000 in kHz
[ 5.352314] [drm] DM_PPLIB: 1067000 in kHz
[ 5.352315] [drm] DM_PPLIB: 1200000 in kHz
[ 5.352317] [drm] DM_PPLIB: values for Invalid clock
[ 5.352318] [drm] DM_PPLIB: 300000 in kHz
[ 5.352318] [drm] DM_PPLIB: 600000 in kHz
[ 5.352319] [drm] DM_PPLIB: 626000 in kHz
[ 5.352320] [drm] DM_PPLIB: 654000 in kHz
(source: HP EliteBook 745 G5 w. RAVEN 0x1002:0x15DD 0x103C:0x83D5 0xD1)
On my system above "Invalid" names got replaced by "F" and "DCF".
The same problem was occurring on Huawei Matebook D with just 667000 kHz
instead of 400000 kHz.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/dc/dm_services_types.h | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dm_services_types.h b/drivers/gpu/drm/amd/display/dc/dm_services_types.h
index 1af8c777b3ac..9afd36a031a9 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_services_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_services_types.h
@@ -82,7 +82,15 @@ enum dm_pp_clock_type {
#define DC_DECODE_PP_CLOCK_TYPE(clk_type) \
(clk_type) == DM_PP_CLOCK_TYPE_DISPLAY_CLK ? "Display" : \
(clk_type) == DM_PP_CLOCK_TYPE_ENGINE_CLK ? "Engine" : \
- (clk_type) == DM_PP_CLOCK_TYPE_MEMORY_CLK ? "Memory" : "Invalid"
+ (clk_type) == DM_PP_CLOCK_TYPE_MEMORY_CLK ? "Memory" : \
+ (clk_type) == DM_PP_CLOCK_TYPE_DCFCLK ? "DCF" : \
+ (clk_type) == DM_PP_CLOCK_TYPE_DCEFCLK ? "DCEF" : \
+ (clk_type) == DM_PP_CLOCK_TYPE_SOCCLK ? "SoC" : \
+ (clk_type) == DM_PP_CLOCK_TYPE_PIXELCLK ? "Pixel" : \
+ (clk_type) == DM_PP_CLOCK_TYPE_DISPLAYPHYCLK ? "Display PHY" : \
+ (clk_type) == DM_PP_CLOCK_TYPE_DPPCLK ? "DPP" : \
+ (clk_type) == DM_PP_CLOCK_TYPE_FCLK ? "F" : \
+ "Invalid"
#define DM_PP_MAX_CLOCK_LEVELS 8
--
2.17.1
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