blob: 3df8939ec389a969d52360ed95ac552ea7a85054 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
|
From 58fc6a5b4da2621444952d850af29768abed5e3f Mon Sep 17 00:00:00 2001
From: Raveendra Talabattula <raveendra.talabattula@amd.com>
Date: Thu, 7 Feb 2019 11:45:55 +0530
Subject: [PATCH 0626/2940] drm/amdgpu: psp firmware load status check
Signed-off-by: Raveendra Talabattula <raveendra.talabattula@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 84d7ee97070a..4b74c9ccb0e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -133,6 +133,13 @@ psp_cmd_submit_buf(struct psp_context *psp,
while (*((unsigned int *)psp->fence_buf) != index) {
msleep(1);
}
+
+ /* the status field must be 0 after FW is loaded */
+ if (ucode && psp->cmd_buf_mem->resp.status) {
+ DRM_ERROR("failed loading with status (%d) and ucode id (%d)\n",
+ psp->cmd_buf_mem->resp.status, ucode->ucode_id);
+ return -EINVAL;
+ }
if (ucode) {
ucode->tmr_mc_addr_lo = psp->cmd_buf_mem->resp.fw_addr_lo;
--
2.17.1
|
