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From 7bde92425eb5fcdf830b54077e0965f36584ab6a Mon Sep 17 00:00:00 2001
From: Eric Yang <Eric.Yang2@amd.com>
Date: Mon, 23 Oct 2017 12:06:54 -0400
Subject: [PATCH 2706/4131] drm/amd/display: get remote dpcd caps for timing
validation
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 28 +++++++++++++++++++++++-
4 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index be9a182..a6a762a 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1869,7 +1869,7 @@ enum dc_status dc_link_validate_mode_timing(
const struct dc_crtc_timing *timing)
{
uint32_t max_pix_clk = stream->sink->dongle_max_pix_clk;
- struct dc_dongle_caps *dongle_caps = &link->link_status.dpcd_caps->dongle_caps;
+ struct dc_dongle_caps *dongle_caps = &link->dpcd_caps.dongle_caps;
/* A hack to avoid failing any modes for EDID override feature on
* topology change such as lower quality cable for DP or different dongle
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 8e97b42..cd87d85 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2132,7 +2132,7 @@ static void get_active_converter_info(
union dwnstream_port_caps_byte3_hdmi
hdmi_caps = {.raw = det_caps[3] };
- union dwnstream_port_caps_byte1
+ union dwnstream_port_caps_byte2
hdmi_color_caps = {.raw = det_caps[2] };
link->dpcd_caps.dongle_caps.dp_hdmi_max_pixel_clk =
det_caps[1] * 25000;
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 4217285..be5024d 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -1043,6 +1043,7 @@ struct dc_sink {
/* private to dc_sink.c */
struct kref refcount;
+
};
void dc_sink_retain(struct dc_sink *sink);
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index 77e2de6..2726b02 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
@@ -255,7 +255,7 @@ enum dpcd_downstream_port_detailed_type {
DOWN_STREAM_DETAILED_DP_PLUS_PLUS
};
-union dwnstream_port_caps_byte1 {
+union dwnstream_port_caps_byte2 {
struct {
uint8_t MAX_BITS_PER_COLOR_COMPONENT:2;
uint8_t RESERVED:6;
@@ -298,6 +298,32 @@ union dwnstream_port_caps_byte3_hdmi {
/*4-byte structure for detailed capabilities of a down-stream port
(DP-to-TMDS converter).*/
+union dwnstream_portxcaps {
+ struct {
+ union dwnstream_port_caps_byte0 byte0;
+ unsigned char max_TMDS_clock; //byte1
+ union dwnstream_port_caps_byte2 byte2;
+
+ union {
+ union dwnstream_port_caps_byte3_dvi byteDVI;
+ union dwnstream_port_caps_byte3_hdmi byteHDMI;
+ } byte3;
+ } bytes;
+
+ unsigned char raw[4];
+};
+
+union downstream_port {
+ struct {
+ unsigned char present:1;
+ unsigned char type:2;
+ unsigned char format_conv:1;
+ unsigned char detailed_caps:1;
+ unsigned char reserved:3;
+ } bits;
+ unsigned char raw;
+};
+
union sink_status {
struct {
--
2.7.4
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