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From c2d8cc52beae81712528f4016aec8fabeeb7c757 Mon Sep 17 00:00:00 2001
From: Felix Kuehling <Felix.Kuehling@amd.com>
Date: Thu, 16 Mar 2017 13:53:33 -0400
Subject: [PATCH 1628/4131] drm/amdgpu: Make PTE flags per mapping, not per BO
PTE flags are ASIC-specific. Vega10 PTEs use different flags. So
two mappings of the same BO on different GPUs may need different
flags. Store the ASIC-specific PTE flags per mapping, not per BO.
Change-Id: Id27363c61f60699337acb3e2721ec0345d70ae6b
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 35 +++++++++++-------------
2 files changed, 18 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
index 23e2f12..a6a538ac 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
@@ -43,6 +43,7 @@ struct kfd_bo_va_list {
bool is_mapped;
bool map_fail;
uint64_t va;
+ uint64_t pte_flags;
};
struct kgd_mem {
@@ -60,7 +61,7 @@ struct kgd_mem {
struct delayed_work work; /* for restore evicted mem */
struct mm_struct *mm; /* for restore */
- uint64_t pte_flags;
+ uint32_t mapping_flags;
/* flags bitfield */
bool coherent : 1;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 29dcc29..e8d3b5d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -360,6 +360,8 @@ static int add_bo_to_vm(struct amdgpu_device *adev, struct kgd_mem *mem,
}
bo_va_entry->va = va;
+ bo_va_entry->pte_flags = amdgpu_vm_get_pte_flags(adev,
+ mem->mapping_flags);
bo_va_entry->kgd_dev = (void *)adev;
list_add(&bo_va_entry->bo_list, list_bo_va);
@@ -503,7 +505,7 @@ static int __alloc_memory_of_gpu(struct kgd_dev *kgd, uint64_t va,
uint64_t user_addr = 0;
int byte_align;
u32 alloc_domain;
- uint32_t get_pte_flags;
+ uint32_t mapping_flags;
struct amdkfd_vm *kfd_vm = (struct amdkfd_vm *)vm;
BUG_ON(kgd == NULL);
@@ -537,17 +539,17 @@ static int __alloc_memory_of_gpu(struct kgd_dev *kgd, uint64_t va,
(*mem)->no_substitute = no_sub;
(*mem)->aql_queue = aql_queue;
- get_pte_flags = AMDGPU_VM_PAGE_READABLE;
+ mapping_flags = AMDGPU_VM_PAGE_READABLE;
if (!readonly)
- get_pte_flags |= AMDGPU_VM_PAGE_WRITEABLE;
+ mapping_flags |= AMDGPU_VM_PAGE_WRITEABLE;
if (execute)
- get_pte_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
+ mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
if (coherent)
- get_pte_flags |= AMDGPU_VM_MTYPE_UC;
+ mapping_flags |= AMDGPU_VM_MTYPE_UC;
else
- get_pte_flags |= AMDGPU_VM_MTYPE_NC;
+ mapping_flags |= AMDGPU_VM_MTYPE_NC;
- (*mem)->pte_flags = amdgpu_vm_get_pte_flags(adev, get_pte_flags);
+ (*mem)->mapping_flags = mapping_flags;
alloc_domain = userptr ? AMDGPU_GEM_DOMAIN_CPU : domain;
@@ -974,8 +976,7 @@ static int update_gpuvm_pte(struct amdgpu_device *adev,
}
static int map_bo_to_gpuvm(struct amdgpu_device *adev,
- struct kfd_bo_va_list *entry, uint64_t pte_flags,
- struct amdgpu_sync *sync)
+ struct kfd_bo_va_list *entry, struct amdgpu_sync *sync)
{
int ret;
struct amdgpu_bo *bo = entry->bo_va->bo;
@@ -1005,7 +1006,7 @@ static int map_bo_to_gpuvm(struct amdgpu_device *adev,
*/
ret = amdgpu_vm_bo_map(adev, entry->bo_va,
entry->va, 0, amdgpu_bo_size(bo),
- pte_flags);
+ entry->pte_flags);
if (ret != 0) {
pr_err("Failed to map VA 0x%llx in vm. ret %d\n",
entry->va, ret);
@@ -1299,8 +1300,7 @@ int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
entry->va, entry->va + bo_size,
entry);
- ret = map_bo_to_gpuvm(adev, entry, mem->pte_flags,
- &ctx.sync);
+ ret = map_bo_to_gpuvm(adev, entry, &ctx.sync);
if (ret != 0) {
pr_err("Failed to map radeon bo to gpuvm\n");
goto map_bo_to_gpuvm_failed;
@@ -1866,11 +1866,9 @@ int amdgpu_amdkfd_gpuvm_import_dmabuf(struct kgd_dev *kgd,
INIT_LIST_HEAD(&(*mem)->bo_va_list);
mutex_init(&(*mem)->lock);
- (*mem)->pte_flags = amdgpu_vm_get_pte_flags(adev,
- AMDGPU_VM_PAGE_READABLE |
- AMDGPU_VM_PAGE_WRITEABLE |
- AMDGPU_VM_PAGE_EXECUTABLE |
- AMDGPU_VM_MTYPE_NC);
+ (*mem)->mapping_flags =
+ AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE |
+ AMDGPU_VM_PAGE_EXECUTABLE | AMDGPU_VM_MTYPE_NC;
(*mem)->bo = amdgpu_bo_ref(bo);
(*mem)->va = va;
@@ -2066,8 +2064,7 @@ int amdgpu_amdkfd_gpuvm_restore_mem(struct kgd_mem *mem, struct mm_struct *mm)
continue;
}
- r = map_bo_to_gpuvm(adev, entry, mem->pte_flags,
- &ctx.sync);
+ r = map_bo_to_gpuvm(adev, entry, &ctx.sync);
if (unlikely(r != 0)) {
pr_err("Failed to map BO to gpuvm\n");
entry->map_fail = true;
--
2.7.4
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