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From fbd97b85769ee9bae4d946a79a82440c0ae46506 Mon Sep 17 00:00:00 2001
From: shaoyunl <Shaoyun.Liu@amd.com>
Date: Mon, 14 Mar 2016 15:26:09 -0400
Subject: [PATCH 1380/4131] drm/amdgpu: get_vm_fault implementation on amdgpu
side
amdgpu save the vm fault related information for KFD usage and keep the
copy until KFD read it.
Change-Id: Ib7a65dfa062e5cdd243beeefc3890409c0bfe90f
Signed-off-by: shaoyun liu <shaoyun.liu@amd.com>
Conflicts:
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ++++
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 20 ++++++++++++++++++++
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 20 ++++++++++++++++++++
3 files changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b20c0e4..d8c5c45 100755
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -183,6 +183,7 @@ struct amdgpu_job;
struct amdgpu_irq_src;
struct amdgpu_fpriv;
struct kfd_process_device;
+struct kfd_vm_fault_info;
enum amdgpu_cp_irq {
AMDGPU_CP_IRQ_GFX_EOP = 0,
@@ -529,6 +530,9 @@ struct amdgpu_mc {
u64 private_aperture_end;
/* protects concurrent invalidation */
spinlock_t invalidate_lock;
+
+ struct kfd_vm_fault_info *vm_fault_info;
+ atomic_t vm_fault_info_updated;
};
/*
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 2256277..378f115 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -27,6 +27,7 @@
#include "cik.h"
#include "gmc_v7_0.h"
#include "amdgpu_ucode.h"
+#include "amdgpu_amdkfd.h"
#include "bif/bif_4_1_d.h"
#include "bif/bif_4_1_sh_mask.h"
@@ -752,6 +753,7 @@ static void gmc_v7_0_vm_decode_fault(struct amdgpu_device *adev,
u32 status, u32 addr, u32 mc_client)
{
u32 mc_id;
+ struct kfd_vm_fault_info *info = adev->mc.vm_fault_info;
u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);
u32 protections = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,
PROTECTIONS);
@@ -766,6 +768,18 @@ static void gmc_v7_0_vm_decode_fault(struct amdgpu_device *adev,
REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,
MEMORY_CLIENT_RW) ?
"write" : "read", block, mc_client, mc_id);
+
+ if (!atomic_read(&adev->mc.vm_fault_info_updated)) {
+ info->vmid = vmid;
+ info->mc_id = mc_id;
+ info->page_addr = addr;
+ info->prot_valid = protections & 0x4 ? true : false;
+ info->prot_read = protections & 0x8 ? true : false;
+ info->prot_write = protections & 0x10 ? true : false;
+ info->prot_exec = protections & 0x20 ? true : false;
+ mb();
+ atomic_set(&adev->mc.vm_fault_info_updated, 1);
+ }
}
@@ -1039,6 +1053,12 @@ static int gmc_v7_0_sw_init(void *handle)
adev->vm_manager.vram_base_offset = 0;
}
+ adev->mc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info),
+ GFP_KERNEL);
+ if (!adev->mc.vm_fault_info)
+ return -ENOMEM;
+ atomic_set(&adev->mc.vm_fault_info_updated, 0);
+
return 0;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 3b54e9a..737a623 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -25,6 +25,7 @@
#include "amdgpu.h"
#include "gmc_v8_0.h"
#include "amdgpu_ucode.h"
+#include "amdgpu_amdkfd.h"
#include "gmc/gmc_8_1_d.h"
#include "gmc/gmc_8_1_sh_mask.h"
@@ -968,6 +969,7 @@ static void gmc_v8_0_vm_decode_fault(struct amdgpu_device *adev,
u32 status, u32 addr, u32 mc_client)
{
u32 mc_id;
+ struct kfd_vm_fault_info *info = adev->mc.vm_fault_info;
u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);
u32 protections = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,
PROTECTIONS);
@@ -982,6 +984,18 @@ static void gmc_v8_0_vm_decode_fault(struct amdgpu_device *adev,
REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,
MEMORY_CLIENT_RW) ?
"write" : "read", block, mc_client, mc_id);
+
+ if (!atomic_read(&adev->mc.vm_fault_info_updated)) {
+ info->vmid = vmid;
+ info->mc_id = mc_id;
+ info->page_addr = addr;
+ info->prot_valid = protections & 0x4 ? true : false;
+ info->prot_read = protections & 0x8 ? true : false;
+ info->prot_write = protections & 0x10 ? true : false;
+ info->prot_exec = protections & 0x20 ? true : false;
+ mb();
+ atomic_set(&adev->mc.vm_fault_info_updated, 1);
+ }
}
static int gmc_v8_0_convert_vram_type(int mc_seq_vram_type)
@@ -1136,6 +1150,12 @@ static int gmc_v8_0_sw_init(void *handle)
adev->vm_manager.vram_base_offset = 0;
}
+ adev->mc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info),
+ GFP_KERNEL);
+ if (!adev->mc.vm_fault_info)
+ return -ENOMEM;
+ atomic_set(&adev->mc.vm_fault_info_updated, 0);
+
/* Allow BIF to recode atomics to PCIe 3.0 AtomicOps.
*/
pci_enable_atomic_request(adev->pdev);
--
2.7.4
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