diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3281-drm-amdgpu-sdma5-add-placeholder-for-navi12-golden-s.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3281-drm-amdgpu-sdma5-add-placeholder-for-navi12-golden-s.patch | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3281-drm-amdgpu-sdma5-add-placeholder-for-navi12-golden-s.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3281-drm-amdgpu-sdma5-add-placeholder-for-navi12-golden-s.patch new file mode 100644 index 00000000..16bbf001 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3281-drm-amdgpu-sdma5-add-placeholder-for-navi12-golden-s.patch @@ -0,0 +1,47 @@ +From d3d80c31d8c77adde76c001b572dc8f50cba0ebb Mon Sep 17 00:00:00 2001 +From: Xiaojie Yuan <xiaojie.yuan@amd.com> +Date: Mon, 17 Dec 2018 18:07:22 +0800 +Subject: [PATCH 3281/4256] drm/amdgpu/sdma5: add placeholder for navi12 golden + settings + +None yet. + +Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> +Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +index 506b62270e7c..eb6ab506e309 100644 +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +@@ -95,6 +95,9 @@ static const struct soc15_reg_golden golden_settings_sdma_nv14[] = { + SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000), + }; + ++static const struct soc15_reg_golden golden_settings_sdma_nv12[] = { ++}; ++ + static u32 sdma_v5_0_get_reg_offset(struct amdgpu_device *adev, u32 instance, u32 internal_offset) + { + u32 base; +@@ -132,6 +135,14 @@ static void sdma_v5_0_init_golden_registers(struct amdgpu_device *adev) + golden_settings_sdma_nv14, + (const u32)ARRAY_SIZE(golden_settings_sdma_nv14)); + break; ++ case CHIP_NAVI12: ++ soc15_program_register_sequence(adev, ++ golden_settings_sdma_5, ++ (const u32)ARRAY_SIZE(golden_settings_sdma_5)); ++ soc15_program_register_sequence(adev, ++ golden_settings_sdma_nv12, ++ (const u32)ARRAY_SIZE(golden_settings_sdma_nv12)); ++ break; + default: + break; + } +-- +2.17.1 + |