diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3178-drm-amd-powerplay-support-VCN-powergate-status-retri.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3178-drm-amd-powerplay-support-VCN-powergate-status-retri.patch | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3178-drm-amd-powerplay-support-VCN-powergate-status-retri.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3178-drm-amd-powerplay-support-VCN-powergate-status-retri.patch new file mode 100644 index 00000000..bf9db5cd --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3178-drm-amd-powerplay-support-VCN-powergate-status-retri.patch @@ -0,0 +1,64 @@ +From 5bbdcd5d075f49d136893b2c7b5ce7a2bea379fa Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Mon, 22 Jul 2019 09:55:36 +0800 +Subject: [PATCH 3178/4256] drm/amd/powerplay: support VCN powergate status + retrieval on Raven + +Enable VCN powergate status report on Raven. + +Signed-off-by: Evan Quan <evan.quan@amd.com> +Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c +index e32ae9d3373c..18e780f566fa 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c +@@ -1111,6 +1111,7 @@ static int smu10_thermal_get_temperature(struct pp_hwmgr *hwmgr) + static int smu10_read_sensor(struct pp_hwmgr *hwmgr, int idx, + void *value, int *size) + { ++ struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); + uint32_t sclk, mclk; + int ret = 0; + +@@ -1132,6 +1133,10 @@ static int smu10_read_sensor(struct pp_hwmgr *hwmgr, int idx, + case AMDGPU_PP_SENSOR_GPU_TEMP: + *((uint32_t *)value) = smu10_thermal_get_temperature(hwmgr); + break; ++ case AMDGPU_PP_SENSOR_VCN_POWER_STATE: ++ *(uint32_t *)value = smu10_data->vcn_power_gated ? 0 : 1; ++ *size = 4; ++ break; + default: + ret = -EINVAL; + break; +@@ -1175,18 +1180,22 @@ static int smu10_powergate_sdma(struct pp_hwmgr *hwmgr, bool gate) + + static void smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate) + { ++ struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); ++ + if (bgate) { + amdgpu_device_ip_set_powergating_state(hwmgr->adev, + AMD_IP_BLOCK_TYPE_VCN, + AMD_PG_STATE_GATE); + smum_send_msg_to_smc_with_parameter(hwmgr, + PPSMC_MSG_PowerDownVcn, 0); ++ smu10_data->vcn_power_gated = true; + } else { + smum_send_msg_to_smc_with_parameter(hwmgr, + PPSMC_MSG_PowerUpVcn, 0); + amdgpu_device_ip_set_powergating_state(hwmgr->adev, + AMD_IP_BLOCK_TYPE_VCN, + AMD_PG_STATE_UNGATE); ++ smu10_data->vcn_power_gated = false; + } + } + +-- +2.17.1 + |