diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3162-drm-amdkfd-Save-restore-flat_scratch_lo-hi-on-gfx10.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3162-drm-amdkfd-Save-restore-flat_scratch_lo-hi-on-gfx10.patch | 154 |
1 files changed, 154 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3162-drm-amdkfd-Save-restore-flat_scratch_lo-hi-on-gfx10.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3162-drm-amdkfd-Save-restore-flat_scratch_lo-hi-on-gfx10.patch new file mode 100644 index 00000000..e274e73c --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3162-drm-amdkfd-Save-restore-flat_scratch_lo-hi-on-gfx10.patch @@ -0,0 +1,154 @@ +From 12596bce220b105b2ad0708ce1fe0b240fa55f5e Mon Sep 17 00:00:00 2001 +From: Jay Cornwall <jay.cornwall@amd.com> +Date: Sun, 28 Jul 2019 15:25:05 -0500 +Subject: [PATCH 3162/4256] drm/amdkfd: Save/restore flat_scratch_lo/hi on + gfx10 + +These moved from SGPRs in gfx9 to HWREG in gfx10. + +Cc: Shaoyun Liu <shaoyun.liu@amd.com> +Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: shaoyunl <shaoyun.liu@amd.com> +--- + .../gpu/drm/amd/amdkfd/cwsr_trap_handler.h | 56 +++++++++++-------- + .../amd/amdkfd/cwsr_trap_handler_gfx10.asm | 14 +++++ + 2 files changed, 48 insertions(+), 22 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h +index c10e424dd1f5..8089bb37f393 100644 +--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h ++++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h +@@ -680,7 +680,7 @@ static const uint32_t cwsr_trap_gfx9_hex[] = { + }; + + static const uint32_t cwsr_trap_gfx10_hex[] = { +- 0xbf820001, 0xbf8201b2, ++ 0xbf820001, 0xbf8201c0, + 0xb0804004, 0xb978f802, + 0x8a788678, 0xb971f803, + 0x876eff71, 0x00000400, +@@ -772,6 +772,13 @@ static const uint32_t cwsr_trap_gfx10_hex[] = { + 0xb97bf801, 0xbefe037c, + 0xbefc037a, 0xf4611efa, + 0xf8000000, 0x807a847a, ++ 0xbefc037e, 0xb97bf814, ++ 0xbefe037c, 0xbefc037a, ++ 0xf4611efa, 0xf8000000, ++ 0x807a847a, 0xbefc037e, ++ 0xb97bf815, 0xbefe037c, ++ 0xbefc037a, 0xf4611efa, ++ 0xf8000000, 0x807a847a, + 0xbefc037e, 0x8776ff7f, + 0x04000000, 0xbeef0380, + 0x886f6f76, 0xb97a2a05, +@@ -897,7 +904,7 @@ static const uint32_t cwsr_trap_gfx10_hex[] = { + 0xe0704000, 0x7a5d0000, + 0x807c817c, 0x807aff7a, + 0x00000080, 0xbf0a717c, +- 0xbf85fff8, 0xbf820138, ++ 0xbf85fff8, 0xbf820141, + 0xbef4037e, 0x8775ff7f, + 0x0000ffff, 0x8875ff75, + 0x00040000, 0xbef60380, +@@ -1033,30 +1040,35 @@ static const uint32_t cwsr_trap_gfx10_hex[] = { + 0x80788478, 0xf4211e7a, + 0xf0000000, 0x80788478, + 0xf4211cfa, 0xf0000000, ++ 0x80788478, 0xf4211bba, ++ 0xf0000000, 0x80788478, ++ 0xbf8cc07f, 0xb9eef814, ++ 0xf4211bba, 0xf0000000, + 0x80788478, 0xbf8cc07f, +- 0xbef2036d, 0x876dff72, +- 0x0000ffff, 0xbefc036f, +- 0xbefe037a, 0xbeff037b, +- 0x876f71ff, 0x000003ff, +- 0xb9ef4803, 0xb9f9f816, +- 0x876f71ff, 0xfffff800, +- 0x906f8b6f, 0xb9efa2c3, +- 0xb9f3f801, 0x876fff72, +- 0xfc000000, 0x906f9a6f, +- 0x8f6f906f, 0xbef30380, ++ 0xb9eef815, 0xbef2036d, ++ 0x876dff72, 0x0000ffff, ++ 0xbefc036f, 0xbefe037a, ++ 0xbeff037b, 0x876f71ff, ++ 0x000003ff, 0xb9ef4803, ++ 0xb9f9f816, 0x876f71ff, ++ 0xfffff800, 0x906f8b6f, ++ 0xb9efa2c3, 0xb9f3f801, ++ 0x876fff72, 0xfc000000, ++ 0x906f9a6f, 0x8f6f906f, ++ 0xbef30380, 0x88736f73, ++ 0x876fff72, 0x02000000, ++ 0x906f996f, 0x8f6f8f6f, + 0x88736f73, 0x876fff72, +- 0x02000000, 0x906f996f, +- 0x8f6f8f6f, 0x88736f73, +- 0x876fff72, 0x01000000, +- 0x906f986f, 0x8f6f996f, +- 0x88736f73, 0x876fff70, +- 0x00800000, 0x906f976f, +- 0xb9f3f807, 0x87fe7e7e, +- 0x87ea6a6a, 0xb9f0f802, +- 0xbf8a0000, 0xbe80226c, +- 0xbf810000, 0xbf9f0000, ++ 0x01000000, 0x906f986f, ++ 0x8f6f996f, 0x88736f73, ++ 0x876fff70, 0x00800000, ++ 0x906f976f, 0xb9f3f807, ++ 0x87fe7e7e, 0x87ea6a6a, ++ 0xb9f0f802, 0xbf8a0000, ++ 0xbe80226c, 0xbf810000, + 0xbf9f0000, 0xbf9f0000, + 0xbf9f0000, 0xbf9f0000, ++ 0xbf9f0000, 0x00000000, + }; + static const uint32_t cwsr_trap_arcturus_hex[] = { + 0xbf820001, 0xbf8202c4, +diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm +index be6f7d1847fa..fafdfd2ac610 100644 +--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm ++++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm +@@ -132,6 +132,7 @@ var s_restore_tmp = ttmp6 + var s_restore_mem_offset_save = s_restore_tmp + var s_restore_m0 = s_restore_alloc_size + var s_restore_mode = ttmp7 ++var s_restore_flat_scratch = ttmp2 + var s_restore_pc_lo = ttmp0 + var s_restore_pc_hi = ttmp1 + var s_restore_exec_lo = ttmp14 +@@ -313,6 +314,12 @@ L_SAVE_HWREG: + s_getreg_b32 s_save_m0, hwreg(HW_REG_MODE) + write_hwreg_to_mem(s_save_m0, s_save_buf_rsrc0, s_save_mem_offset) + ++ s_getreg_b32 s_save_m0, hwreg(HW_REG_SHADER_FLAT_SCRATCH_LO) ++ write_hwreg_to_mem(s_save_m0, s_save_buf_rsrc0, s_save_mem_offset) ++ ++ s_getreg_b32 s_save_m0, hwreg(HW_REG_SHADER_FLAT_SCRATCH_HI) ++ write_hwreg_to_mem(s_save_m0, s_save_buf_rsrc0, s_save_mem_offset) ++ + /* the first wave in the threadgroup */ + s_and_b32 s_save_tmp, s_save_spi_init_hi, S_SAVE_SPI_INIT_FIRST_WAVE_MASK + s_mov_b32 s_save_exec_hi, 0x0 +@@ -824,9 +831,16 @@ L_RESTORE_HWREG: + read_hwreg_from_mem(s_restore_trapsts, s_restore_buf_rsrc0, s_restore_mem_offset) + read_hwreg_from_mem(s_restore_xnack_mask, s_restore_buf_rsrc0, s_restore_mem_offset) + read_hwreg_from_mem(s_restore_mode, s_restore_buf_rsrc0, s_restore_mem_offset) ++ read_hwreg_from_mem(s_restore_flat_scratch, s_restore_buf_rsrc0, s_restore_mem_offset) ++ s_waitcnt lgkmcnt(0) ++ ++ s_setreg_b32 hwreg(HW_REG_SHADER_FLAT_SCRATCH_LO), s_restore_flat_scratch + ++ read_hwreg_from_mem(s_restore_flat_scratch, s_restore_buf_rsrc0, s_restore_mem_offset) + s_waitcnt lgkmcnt(0) //from now on, it is safe to restore STATUS and IB_STS + ++ s_setreg_b32 hwreg(HW_REG_SHADER_FLAT_SCRATCH_HI), s_restore_flat_scratch ++ + s_mov_b32 s_restore_tmp, s_restore_pc_hi + s_and_b32 s_restore_pc_hi, s_restore_tmp, 0x0000ffff //pc[47:32] //Do it here in order not to affect STATUS + +-- +2.17.1 + |