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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3092-drm-amd-display-avoid-power-gate-domains-that-doesn-.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3092-drm-amd-display-avoid-power-gate-domains-that-doesn-.patch78
1 files changed, 78 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3092-drm-amd-display-avoid-power-gate-domains-that-doesn-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3092-drm-amd-display-avoid-power-gate-domains-that-doesn-.patch
new file mode 100644
index 00000000..40c472f6
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3092-drm-amd-display-avoid-power-gate-domains-that-doesn-.patch
@@ -0,0 +1,78 @@
+From d88601b2e31af39ade3f7059907a5cb44425e481 Mon Sep 17 00:00:00 2001
+From: Tony Cheng <tony.cheng@amd.com>
+Date: Sun, 23 Jun 2019 12:07:02 -0500
+Subject: [PATCH 3092/4256] drm/amd/display: avoid power gate domains that
+ doesn't exist
+
+Change-Id: I7800685ccebbf8faa2b7185c501ac0ad78e13e48
+Signed-off-by: Tony Cheng <tony.cheng@amd.com>
+Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
+Acked-by: Leo Li <sunpeng.li@amd.com>
+---
+ .../gpu/drm/amd/display/dc/dce/dce_hwseq.h | 4 ++--
+ .../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 24 ++++++++++++-------
+ 2 files changed, 17 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
+index 3a49f1ffb5dd..245b80b92681 100644
+--- a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
+@@ -227,8 +227,8 @@
+ SR(DOMAIN7_PG_CONFIG), \
+ SR(DOMAIN8_PG_CONFIG), \
+ SR(DOMAIN9_PG_CONFIG), \
+- SR(DOMAIN10_PG_CONFIG), \
+- SR(DOMAIN11_PG_CONFIG), \
++/* SR(DOMAIN10_PG_CONFIG), Navi1x HUBP5 not powergate-able*/\
++/* SR(DOMAIN11_PG_CONFIG), Navi1x DPP5 is not powergate-able */\
+ SR(DOMAIN16_PG_CONFIG), \
+ SR(DOMAIN17_PG_CONFIG), \
+ SR(DOMAIN18_PG_CONFIG), \
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+index 08a96faef775..6f990f772a8b 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+@@ -94,25 +94,31 @@ static void enable_power_gating_plane(
+ REG_UPDATE(DOMAIN2_PG_CONFIG, DOMAIN2_POWER_FORCEON, force_on);
+ REG_UPDATE(DOMAIN4_PG_CONFIG, DOMAIN4_POWER_FORCEON, force_on);
+ REG_UPDATE(DOMAIN6_PG_CONFIG, DOMAIN6_POWER_FORCEON, force_on);
+- REG_UPDATE(DOMAIN8_PG_CONFIG, DOMAIN8_POWER_FORCEON, force_on);
+- /*Do not power gate DCHUB5, should be left at HW default, power on permanently*/
+- /*REG_UPDATE(DOMAIN10_PG_CONFIG, DOMAIN10_POWER_FORCEON, force_on);*/
++ if (REG(DOMAIN8_PG_CONFIG))
++ REG_UPDATE(DOMAIN8_PG_CONFIG, DOMAIN8_POWER_FORCEON, force_on);
++ if (REG(DOMAIN10_PG_CONFIG))
++ REG_UPDATE(DOMAIN10_PG_CONFIG, DOMAIN8_POWER_FORCEON, force_on);
+
+ /* DPP0/1/2/3/4/5 */
+ REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, force_on);
+ REG_UPDATE(DOMAIN3_PG_CONFIG, DOMAIN3_POWER_FORCEON, force_on);
+ REG_UPDATE(DOMAIN5_PG_CONFIG, DOMAIN5_POWER_FORCEON, force_on);
+ REG_UPDATE(DOMAIN7_PG_CONFIG, DOMAIN7_POWER_FORCEON, force_on);
+- REG_UPDATE(DOMAIN9_PG_CONFIG, DOMAIN9_POWER_FORCEON, force_on);
+- /*Do not power gate DPP5, should be left at HW default, power on permanently*/
+- /*REG_UPDATE(DOMAIN11_PG_CONFIG, DOMAIN11_POWER_FORCEON, force_on);*/
++ if (REG(DOMAIN9_PG_CONFIG))
++ REG_UPDATE(DOMAIN9_PG_CONFIG, DOMAIN9_POWER_FORCEON, force_on);
++ if (REG(DOMAIN11_PG_CONFIG))
++ REG_UPDATE(DOMAIN11_PG_CONFIG, DOMAIN9_POWER_FORCEON, force_on);
+
++ /* DCS0/1/2/3/4/5 */
+ REG_UPDATE(DOMAIN16_PG_CONFIG, DOMAIN16_POWER_FORCEON, force_on);
+ REG_UPDATE(DOMAIN17_PG_CONFIG, DOMAIN17_POWER_FORCEON, force_on);
+ REG_UPDATE(DOMAIN18_PG_CONFIG, DOMAIN18_POWER_FORCEON, force_on);
+- REG_UPDATE(DOMAIN19_PG_CONFIG, DOMAIN19_POWER_FORCEON, force_on);
+- REG_UPDATE(DOMAIN20_PG_CONFIG, DOMAIN20_POWER_FORCEON, force_on);
+- REG_UPDATE(DOMAIN21_PG_CONFIG, DOMAIN21_POWER_FORCEON, force_on);
++ if (REG(DOMAIN19_PG_CONFIG))
++ REG_UPDATE(DOMAIN19_PG_CONFIG, DOMAIN19_POWER_FORCEON, force_on);
++ if (REG(DOMAIN20_PG_CONFIG))
++ REG_UPDATE(DOMAIN20_PG_CONFIG, DOMAIN20_POWER_FORCEON, force_on);
++ if (REG(DOMAIN21_PG_CONFIG))
++ REG_UPDATE(DOMAIN21_PG_CONFIG, DOMAIN21_POWER_FORCEON, force_on);
+ }
+
+ void dcn20_dccg_init(struct dce_hwseq *hws)
+--
+2.17.1
+