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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2940-drm-amdgpu-VCN2-expose-rings-functions.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2940-drm-amdgpu-VCN2-expose-rings-functions.patch312
1 files changed, 312 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2940-drm-amdgpu-VCN2-expose-rings-functions.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2940-drm-amdgpu-VCN2-expose-rings-functions.patch
new file mode 100644
index 00000000..fac09857
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2940-drm-amdgpu-VCN2-expose-rings-functions.patch
@@ -0,0 +1,312 @@
+From e37faaa58a8b0e1ce3fe9efa0f9c4ed20a9b618e Mon Sep 17 00:00:00 2001
+From: Leo Liu <leo.liu@amd.com>
+Date: Tue, 9 Jul 2019 10:04:39 -0500
+Subject: [PATCH 2940/2940] drm/amdgpu/VCN2: expose rings functions
+
+They can be reused by VCN2.x family
+
+Signed-off-by: Leo Liu <leo.liu@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 87 +++++++++++++--------------
+ drivers/gpu/drm/amd/amdgpu/vcn_v2_0.h | 38 ++++++++++++
+ 2 files changed, 79 insertions(+), 46 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+index c801b69f0b75..52a5e3ac9f55 100644
+--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+@@ -1490,7 +1490,7 @@ static void vcn_v2_0_dec_ring_set_wptr(struct amdgpu_ring *ring)
+ *
+ * Write a start command to the ring.
+ */
+-static void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring)
++void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring)
+ {
+ struct amdgpu_device *adev = ring->adev;
+
+@@ -1507,7 +1507,7 @@ static void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring)
+ *
+ * Write a end command to the ring.
+ */
+-static void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring)
++void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring)
+ {
+ struct amdgpu_device *adev = ring->adev;
+
+@@ -1522,7 +1522,7 @@ static void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring)
+ *
+ * Write a nop command to the ring.
+ */
+-static void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
++void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
+ {
+ struct amdgpu_device *adev = ring->adev;
+ int i;
+@@ -1543,8 +1543,8 @@ static void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t coun
+ *
+ * Write a fence and a trap command to the ring.
+ */
+-static void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
+- unsigned flags)
++void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
++ unsigned flags)
+ {
+ struct amdgpu_device *adev = ring->adev;
+
+@@ -1580,10 +1580,10 @@ static void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64
+ *
+ * Write ring commands to execute the indirect buffer
+ */
+-static void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring,
+- struct amdgpu_job *job,
+- struct amdgpu_ib *ib,
+- uint32_t flags)
++void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring,
++ struct amdgpu_job *job,
++ struct amdgpu_ib *ib,
++ uint32_t flags)
+ {
+ struct amdgpu_device *adev = ring->adev;
+ unsigned vmid = AMDGPU_JOB_GET_VMID(job);
+@@ -1599,9 +1599,8 @@ static void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring,
+ amdgpu_ring_write(ring, ib->length_dw);
+ }
+
+-static void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring,
+- uint32_t reg, uint32_t val,
+- uint32_t mask)
++void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
++ uint32_t val, uint32_t mask)
+ {
+ struct amdgpu_device *adev = ring->adev;
+
+@@ -1619,8 +1618,8 @@ static void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring,
+ amdgpu_ring_write(ring, VCN_DEC_CMD_REG_READ_COND_WAIT << 1);
+ }
+
+-static void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,
+- unsigned vmid, uint64_t pd_addr)
++void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,
++ unsigned vmid, uint64_t pd_addr)
+ {
+ struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
+ uint32_t data0, data1, mask;
+@@ -1634,8 +1633,8 @@ static void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,
+ vcn_v2_0_dec_ring_emit_reg_wait(ring, data0, data1, mask);
+ }
+
+-static void vcn_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring,
+- uint32_t reg, uint32_t val)
++void vcn_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring,
++ uint32_t reg, uint32_t val)
+ {
+ struct amdgpu_device *adev = ring->adev;
+
+@@ -1727,8 +1726,8 @@ static void vcn_v2_0_enc_ring_set_wptr(struct amdgpu_ring *ring)
+ *
+ * Write enc a fence and a trap command to the ring.
+ */
+-static void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
+- u64 seq, unsigned flags)
++void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
++ u64 seq, unsigned flags)
+ {
+ WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
+
+@@ -1739,7 +1738,7 @@ static void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
+ amdgpu_ring_write(ring, VCN_ENC_CMD_TRAP);
+ }
+
+-static void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring)
++void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring)
+ {
+ amdgpu_ring_write(ring, VCN_ENC_CMD_END);
+ }
+@@ -1752,10 +1751,10 @@ static void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring)
+ *
+ * Write enc ring commands to execute the indirect buffer
+ */
+-static void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring,
+- struct amdgpu_job *job,
+- struct amdgpu_ib *ib,
+- uint32_t flags)
++void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring,
++ struct amdgpu_job *job,
++ struct amdgpu_ib *ib,
++ uint32_t flags)
+ {
+ unsigned vmid = AMDGPU_JOB_GET_VMID(job);
+
+@@ -1766,9 +1765,8 @@ static void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring,
+ amdgpu_ring_write(ring, ib->length_dw);
+ }
+
+-static void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring,
+- uint32_t reg, uint32_t val,
+- uint32_t mask)
++void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
++ uint32_t val, uint32_t mask)
+ {
+ amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WAIT);
+ amdgpu_ring_write(ring, reg << 2);
+@@ -1776,8 +1774,8 @@ static void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring,
+ amdgpu_ring_write(ring, val);
+ }
+
+-static void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
+- unsigned int vmid, uint64_t pd_addr)
++void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
++ unsigned int vmid, uint64_t pd_addr)
+ {
+ struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
+
+@@ -1788,8 +1786,7 @@ static void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
+ lower_32_bits(pd_addr), 0xffffffff);
+ }
+
+-static void vcn_v2_0_enc_ring_emit_wreg(struct amdgpu_ring *ring,
+- uint32_t reg, uint32_t val)
++void vcn_v2_0_enc_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val)
+ {
+ amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WRITE);
+ amdgpu_ring_write(ring, reg << 2);
+@@ -1853,7 +1850,7 @@ static void vcn_v2_0_jpeg_ring_set_wptr(struct amdgpu_ring *ring)
+ *
+ * Write a start command to the ring.
+ */
+-static void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring)
++void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring)
+ {
+ amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
+ 0, 0, PACKETJ_TYPE0));
+@@ -1871,7 +1868,7 @@ static void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring)
+ *
+ * Write a end command to the ring.
+ */
+-static void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring)
++void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring)
+ {
+ amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
+ 0, 0, PACKETJ_TYPE0));
+@@ -1890,8 +1887,8 @@ static void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring)
+ *
+ * Write a fence and a trap command to the ring.
+ */
+-static void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
+- unsigned flags)
++void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
++ unsigned flags)
+ {
+ WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
+
+@@ -1939,10 +1936,10 @@ static void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u6
+ *
+ * Write ring commands to execute the indirect buffer.
+ */
+-static void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring,
+- struct amdgpu_job *job,
+- struct amdgpu_ib *ib,
+- uint32_t flags)
++void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring,
++ struct amdgpu_job *job,
++ struct amdgpu_ib *ib,
++ uint32_t flags)
+ {
+ unsigned vmid = AMDGPU_JOB_GET_VMID(job);
+
+@@ -1990,9 +1987,8 @@ static void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring,
+ amdgpu_ring_write(ring, 0x2);
+ }
+
+-static void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring,
+- uint32_t reg, uint32_t val,
+- uint32_t mask)
++void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
++ uint32_t val, uint32_t mask)
+ {
+ uint32_t reg_offset = (reg << 2);
+
+@@ -2018,8 +2014,8 @@ static void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring,
+ amdgpu_ring_write(ring, mask);
+ }
+
+-static void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring,
+- unsigned vmid, uint64_t pd_addr)
++void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring,
++ unsigned vmid, uint64_t pd_addr)
+ {
+ struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
+ uint32_t data0, data1, mask;
+@@ -2033,8 +2029,7 @@ static void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring,
+ vcn_v2_0_jpeg_ring_emit_reg_wait(ring, data0, data1, mask);
+ }
+
+-static void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring,
+- uint32_t reg, uint32_t val)
++void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val)
+ {
+ uint32_t reg_offset = (reg << 2);
+
+@@ -2052,7 +2047,7 @@ static void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring,
+ amdgpu_ring_write(ring, val);
+ }
+
+-static void vcn_v2_0_jpeg_ring_nop(struct amdgpu_ring *ring, uint32_t count)
++void vcn_v2_0_jpeg_ring_nop(struct amdgpu_ring *ring, uint32_t count)
+ {
+ int i;
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.h b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.h
+index a74227f4663b..8467292f32e5 100644
+--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.h
++++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.h
+@@ -24,6 +24,44 @@
+ #ifndef __VCN_V2_0_H__
+ #define __VCN_V2_0_H__
+
++extern void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring);
++extern void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring);
++extern void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count);
++extern void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
++ unsigned flags);
++extern void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job,
++ struct amdgpu_ib *ib, uint32_t flags);
++extern void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
++ uint32_t val, uint32_t mask);
++extern void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,
++ unsigned vmid, uint64_t pd_addr);
++extern void vcn_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring,
++ uint32_t reg, uint32_t val);
++
++extern void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring);
++extern void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
++ u64 seq, unsigned flags);
++extern void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job,
++ struct amdgpu_ib *ib, uint32_t flags);
++extern void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
++ uint32_t val, uint32_t mask);
++extern void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
++ unsigned int vmid, uint64_t pd_addr);
++extern void vcn_v2_0_enc_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
++
++extern void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring);
++extern void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring);
++extern void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
++ unsigned flags);
++extern void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job,
++ struct amdgpu_ib *ib, uint32_t flags);
++extern void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
++ uint32_t val, uint32_t mask);
++extern void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring,
++ unsigned vmid, uint64_t pd_addr);
++extern void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
++extern void vcn_v2_0_jpeg_ring_nop(struct amdgpu_ring *ring, uint32_t count);
++
+ extern const struct amdgpu_ip_block_version vcn_v2_0_ip_block;
+
+ #endif /* __VCN_V2_0_H__ */
+--
+2.17.1
+
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-05-01 11:01:05 +0000