diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2926-drm-amdkfd-Extend-PM4-packets-to-support-8-SDMA.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2926-drm-amdkfd-Extend-PM4-packets-to-support-8-SDMA.patch | 122 |
1 files changed, 122 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2926-drm-amdkfd-Extend-PM4-packets-to-support-8-SDMA.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2926-drm-amdkfd-Extend-PM4-packets-to-support-8-SDMA.patch new file mode 100644 index 00000000..7b411a5d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2926-drm-amdkfd-Extend-PM4-packets-to-support-8-SDMA.patch @@ -0,0 +1,122 @@ +From bfcbcd9b0e631045eb569b186d70100de7ddf60c Mon Sep 17 00:00:00 2001 +From: Oak Zeng <Oak.Zeng@amd.com> +Date: Thu, 14 Feb 2019 14:53:15 -0600 +Subject: [PATCH 2926/2940] drm/amdkfd: Extend PM4 packets to support 8 SDMA + +Extend map_queue and unmap_queue PM4 packets to support 8 +SDMA engines. The new format is backward compatible. + +Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> +Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c | 26 ++++++++++++++++--- + .../gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h | 14 ++++++++-- + 2 files changed, 34 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c +index d315f4dc2f8d..6a4332f4a3fb 100644 +--- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c ++++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c +@@ -167,6 +167,8 @@ static int pm_map_queues_v9(struct packet_manager *pm, uint32_t *buffer, + packet->bitfields2.engine_sel = + engine_sel__mes_map_queues__compute_vi; + packet->bitfields2.gws_control_queue = q->gws ? 1 : 0; ++ packet->bitfields2.extended_engine_sel = ++ extended_engine_sel__mes_map_queues__legacy_engine_sel; + packet->bitfields2.queue_type = + queue_type__mes_map_queues__normal_compute_vi; + +@@ -182,9 +184,15 @@ static int pm_map_queues_v9(struct packet_manager *pm, uint32_t *buffer, + break; + case KFD_QUEUE_TYPE_SDMA: + case KFD_QUEUE_TYPE_SDMA_XGMI: +- packet->bitfields2.engine_sel = q->properties.sdma_engine_id + +- engine_sel__mes_map_queues__sdma0_vi; + use_static = false; /* no static queues under SDMA */ ++ if (q->properties.sdma_engine_id < 2) ++ packet->bitfields2.engine_sel = q->properties.sdma_engine_id + ++ engine_sel__mes_map_queues__sdma0_vi; ++ else { ++ packet->bitfields2.extended_engine_sel = ++ extended_engine_sel__mes_map_queues__sdma0_to_7_sel; ++ packet->bitfields2.engine_sel = q->properties.sdma_engine_id; ++ } + break; + default: + WARN(1, "queue type %d", q->properties.type); +@@ -259,13 +267,23 @@ static int pm_unmap_queues_v9(struct packet_manager *pm, uint32_t *buffer, + switch (type) { + case KFD_QUEUE_TYPE_COMPUTE: + case KFD_QUEUE_TYPE_DIQ: ++ packet->bitfields2.extended_engine_sel = ++ extended_engine_sel__mes_unmap_queues__legacy_engine_sel; + packet->bitfields2.engine_sel = + engine_sel__mes_unmap_queues__compute; + break; + case KFD_QUEUE_TYPE_SDMA: + case KFD_QUEUE_TYPE_SDMA_XGMI: +- packet->bitfields2.engine_sel = +- engine_sel__mes_unmap_queues__sdma0 + sdma_engine; ++ if (sdma_engine < 2) { ++ packet->bitfields2.extended_engine_sel = ++ extended_engine_sel__mes_unmap_queues__legacy_engine_sel; ++ packet->bitfields2.engine_sel = ++ engine_sel__mes_unmap_queues__sdma0 + sdma_engine; ++ } else { ++ packet->bitfields2.extended_engine_sel = ++ extended_engine_sel__mes_unmap_queues__sdma0_to_7_sel; ++ packet->bitfields2.engine_sel = sdma_engine; ++ } + break; + default: + WARN(1, "queue type %d", type); +diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h b/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h +index c94cb60859f1..249cfa4312a8 100644 +--- a/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h ++++ b/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h +@@ -263,6 +263,10 @@ enum mes_map_queues_engine_sel_enum { + engine_sel__mes_map_queues__sdma1_vi = 3 + }; + ++enum mes_map_queues_extended_engine_sel_enum { ++ extended_engine_sel__mes_map_queues__legacy_engine_sel = 0, ++ extended_engine_sel__mes_map_queues__sdma0_to_7_sel = 1 ++}; + + struct pm4_mes_map_queues { + union { +@@ -272,7 +276,8 @@ struct pm4_mes_map_queues { + + union { + struct { +- uint32_t reserved1:4; ++ uint32_t reserved1:2; ++ enum mes_map_queues_extended_engine_sel_enum extended_engine_sel:2; + enum mes_map_queues_queue_sel_enum queue_sel:2; + uint32_t reserved5:6; + uint32_t gws_control_queue:1; +@@ -385,6 +390,11 @@ enum mes_unmap_queues_engine_sel_enum { + engine_sel__mes_unmap_queues__sdmal = 3 + }; + ++enum mes_unmap_queues_extended_engine_sel_enum { ++ extended_engine_sel__mes_unmap_queues__legacy_engine_sel = 0, ++ extended_engine_sel__mes_unmap_queues__sdma0_to_7_sel = 1 ++}; ++ + struct pm4_mes_unmap_queues { + union { + union PM4_MES_TYPE_3_HEADER header; /* header */ +@@ -394,7 +404,7 @@ struct pm4_mes_unmap_queues { + union { + struct { + enum mes_unmap_queues_action_enum action:2; +- uint32_t reserved1:2; ++ enum mes_unmap_queues_extended_engine_sel_enum extended_engine_sel:2; + enum mes_unmap_queues_queue_sel_enum queue_sel:2; + uint32_t reserved2:20; + enum mes_unmap_queues_engine_sel_enum engine_sel:3; +-- +2.17.1 + |