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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2913-drm-amdgpu-skip-to-get-3D-engine-clockgating-state-f.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2913-drm-amdgpu-skip-to-get-3D-engine-clockgating-state-f.patch47
1 files changed, 47 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2913-drm-amdgpu-skip-to-get-3D-engine-clockgating-state-f.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2913-drm-amdgpu-skip-to-get-3D-engine-clockgating-state-f.patch
new file mode 100644
index 00000000..c1b8876b
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2913-drm-amdgpu-skip-to-get-3D-engine-clockgating-state-f.patch
@@ -0,0 +1,47 @@
+From 25cbb867b87b2857d736ef3a8cb0059dd6dc0d75 Mon Sep 17 00:00:00 2001
+From: Le Ma <le.ma@amd.com>
+Date: Tue, 11 Sep 2018 12:33:11 +0800
+Subject: [PATCH 2913/2940] drm/amdgpu: skip to get 3D engine clockgating state
+ for Arcturus
+
+It's because Arcturus has not 3D engine.
+
+Signed-off-by: Le Ma <le.ma@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 18 ++++++++++--------
+ 1 file changed, 10 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+index 3398695972f2..5feb2b74b002 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+@@ -4338,14 +4338,16 @@ static void gfx_v9_0_get_clockgating_state(void *handle, u32 *flags)
+ if (data & CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK)
+ *flags |= AMD_CG_SUPPORT_GFX_CP_LS | AMD_CG_SUPPORT_GFX_MGLS;
+
+- /* AMD_CG_SUPPORT_GFX_3D_CGCG */
+- data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D);
+- if (data & RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK)
+- *flags |= AMD_CG_SUPPORT_GFX_3D_CGCG;
+-
+- /* AMD_CG_SUPPORT_GFX_3D_CGLS */
+- if (data & RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK)
+- *flags |= AMD_CG_SUPPORT_GFX_3D_CGLS;
++ if (adev->asic_type != CHIP_ARCTURUS) {
++ /* AMD_CG_SUPPORT_GFX_3D_CGCG */
++ data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D);
++ if (data & RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK)
++ *flags |= AMD_CG_SUPPORT_GFX_3D_CGCG;
++
++ /* AMD_CG_SUPPORT_GFX_3D_CGLS */
++ if (data & RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK)
++ *flags |= AMD_CG_SUPPORT_GFX_3D_CGLS;
++ }
+ }
+
+ static u64 gfx_v9_0_ring_get_rptr_gfx(struct amdgpu_ring *ring)
+--
+2.17.1
+