diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2876-drm-amdgpu-remove-memset-after-kzalloc.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2876-drm-amdgpu-remove-memset-after-kzalloc.patch | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2876-drm-amdgpu-remove-memset-after-kzalloc.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2876-drm-amdgpu-remove-memset-after-kzalloc.patch new file mode 100644 index 00000000..822ee273 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2876-drm-amdgpu-remove-memset-after-kzalloc.patch @@ -0,0 +1,73 @@ +From e5fd61f4a46a033397c0c2a9580bd19f7f28b7bf Mon Sep 17 00:00:00 2001 +From: Fuqian Huang <huangfq.daxian@gmail.com> +Date: Mon, 15 Jul 2019 11:17:31 +0800 +Subject: [PATCH 2876/2940] drm/amdgpu: remove memset after kzalloc + +kzalloc has already zeroed the memory during the allocation. +So memset is unneeded. + +Reviewed-by: Emil Velikov <emil.velikov@collabora.com> +Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c | 2 -- + drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c | 2 -- + drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c | 2 -- + drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 2 -- + 4 files changed, 8 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c b/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c +index 1cd5a8b5cdc1..b760f95e7fa7 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c +@@ -1067,8 +1067,6 @@ static int pp_tables_v1_0_initialize(struct pp_hwmgr *hwmgr) + PP_ASSERT_WITH_CODE((NULL != hwmgr->pptable), + "Failed to allocate hwmgr->pptable!", return -ENOMEM); + +- memset(hwmgr->pptable, 0x00, sizeof(struct phm_ppt_v1_information)); +- + powerplay_table = get_powerplay_table(hwmgr); + + PP_ASSERT_WITH_CODE((NULL != powerplay_table), +diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c +index 022f3c8c04f8..edc5fba0f3e1 100644 +--- a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c ++++ b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c +@@ -2704,8 +2704,6 @@ static int ci_initialize_mc_reg_table(struct pp_hwmgr *hwmgr) + cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS2_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS2)); + cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2)); + +- memset(table, 0x00, sizeof(pp_atomctrl_mc_reg_table)); +- + result = atomctrl_initialize_mc_reg_table(hwmgr, module_index, table); + + if (0 == result) +diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c +index f414f22c2245..be461c56d406 100644 +--- a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c ++++ b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c +@@ -2633,8 +2633,6 @@ static int iceland_initialize_mc_reg_table(struct pp_hwmgr *hwmgr) + cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS2_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS2)); + cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2)); + +- memset(table, 0x00, sizeof(pp_atomctrl_mc_reg_table)); +- + result = atomctrl_initialize_mc_reg_table(hwmgr, module_index, table); + + if (0 == result) +diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c +index be5b7dfbe30e..245fd6bfd0ff 100644 +--- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c ++++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c +@@ -3116,8 +3116,6 @@ static int tonga_initialize_mc_reg_table(struct pp_hwmgr *hwmgr) + cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, + cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2)); + +- memset(table, 0x00, sizeof(pp_atomctrl_mc_reg_table)); +- + result = atomctrl_initialize_mc_reg_table(hwmgr, module_index, table); + + if (!result) +-- +2.17.1 + |