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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2839-drm-amdgpu-don-t-invalidate-caches-in-RELEASE_MEM-on.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2839-drm-amdgpu-don-t-invalidate-caches-in-RELEASE_MEM-on.patch48
1 files changed, 48 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2839-drm-amdgpu-don-t-invalidate-caches-in-RELEASE_MEM-on.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2839-drm-amdgpu-don-t-invalidate-caches-in-RELEASE_MEM-on.patch
new file mode 100644
index 00000000..3e99b0a8
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2839-drm-amdgpu-don-t-invalidate-caches-in-RELEASE_MEM-on.patch
@@ -0,0 +1,48 @@
+From 02dd67e78d090a43ff341c0d79d9b87262ccd13a Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= <marek.olsak@amd.com>
+Date: Fri, 28 Jun 2019 18:31:26 -0400
+Subject: [PATCH 2839/2940] drm/amdgpu: don't invalidate caches in RELEASE_MEM,
+ only do the writeback
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This RELEASE_MEM use has the Release semantic, which means we should write
+back but not invalidate. Invalidations only make sense with the Acquire
+semantic (ACQUIRE_MEM), or when RELEASE_MEM is used to do the combined
+Acquire-Release semantic, which is a barrier, not a fence.
+
+The undesirable side effect of doing invalidations for the Release semantic
+is that it invalidates caches while shaders are running, because the Release
+can execute in the middle of the next IB.
+
+UMDs should use ACQUIRE_MEM at the beginning of IBs. Doing cache
+invalidations for a fence (like in this case) doesn't do anything
+for correctness.
+
+Signed-off-by: Marek Olšák <marek.olsak@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 +-----
+ 1 file changed, 1 insertion(+), 5 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+index e5e3fc88de46..09b1634b97c2 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+@@ -4339,11 +4339,7 @@ static void gfx_v10_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
+ amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));
+ amdgpu_ring_write(ring, (PACKET3_RELEASE_MEM_GCR_SEQ |
+ PACKET3_RELEASE_MEM_GCR_GL2_WB |
+- PACKET3_RELEASE_MEM_GCR_GL2_INV |
+- PACKET3_RELEASE_MEM_GCR_GL2_US |
+- PACKET3_RELEASE_MEM_GCR_GL1_INV |
+- PACKET3_RELEASE_MEM_GCR_GLV_INV |
+- PACKET3_RELEASE_MEM_GCR_GLM_INV |
++ PACKET3_RELEASE_MEM_GCR_GLM_INV | /* must be set with GLM_WB */
+ PACKET3_RELEASE_MEM_GCR_GLM_WB |
+ PACKET3_RELEASE_MEM_CACHE_POLICY(3) |
+ PACKET3_RELEASE_MEM_EVENT_TYPE(CACHE_FLUSH_AND_INV_TS_EVENT) |
+--
+2.17.1
+