diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2649-drm-amdgpu-psp-add-psp-support-for-navi14.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2649-drm-amdgpu-psp-add-psp-support-for-navi14.patch | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2649-drm-amdgpu-psp-add-psp-support-for-navi14.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2649-drm-amdgpu-psp-add-psp-support-for-navi14.patch new file mode 100644 index 00000000..4629cb38 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2649-drm-amdgpu-psp-add-psp-support-for-navi14.patch @@ -0,0 +1,69 @@ +From e38a95438f571419fed08c4d6830dc50d8d33656 Mon Sep 17 00:00:00 2001 +From: Xiaojie Yuan <xiaojie.yuan@amd.com> +Date: Tue, 12 Feb 2019 02:27:34 +0000 +Subject: [PATCH 2649/2940] drm/amdgpu/psp: add psp support for navi14 + +Same as navi10. + +Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> +Reviewed-by: Snow Zhang <Snow.Zhang@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 + + drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 8 ++++++-- + 2 files changed, 7 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +index c476f03872e1..8108808267fe 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +@@ -58,6 +58,7 @@ static int psp_early_init(void *handle) + psp->autoload_supported = false; + break; + case CHIP_NAVI10: ++ case CHIP_NAVI14: + psp_v11_0_set_psp_funcs(psp); + psp->autoload_supported = true; + break; +diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c +index 345a57a49365..a040a74d0a1b 100644 +--- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c +@@ -42,6 +42,7 @@ MODULE_FIRMWARE("amdgpu/vega20_ta.bin"); + MODULE_FIRMWARE("amdgpu/vega20_sos_old.bin"); + MODULE_FIRMWARE("amdgpu/navi10_sos.bin"); + MODULE_FIRMWARE("amdgpu/navi10_asd.bin"); ++MODULE_FIRMWARE("amdgpu/navi14_sos.bin"); + + /* address block */ + #define smnMP1_FIRMWARE_FLAGS 0x3010024 +@@ -74,6 +75,9 @@ static int psp_v11_0_init_microcode(struct psp_context *psp) + case CHIP_NAVI10: + chip_name = "navi10"; + break; ++ case CHIP_NAVI14: ++ chip_name = "navi14"; ++ break; + default: + BUG(); + } +@@ -542,7 +546,7 @@ psp_v11_0_sram_map(struct amdgpu_device *adev, + + case AMDGPU_UCODE_ID_RLC_G: + *sram_offset = 0x2000; +- if (adev->asic_type != CHIP_NAVI10) { ++ if (adev->asic_type != CHIP_NAVI10 || adev->asic_type != CHIP_NAVI14) { + *sram_addr_reg_offset = SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_UCODE_ADDR); + *sram_data_reg_offset = SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_UCODE_DATA); + } +@@ -554,7 +558,7 @@ psp_v11_0_sram_map(struct amdgpu_device *adev, + + case AMDGPU_UCODE_ID_SDMA0: + *sram_offset = 0x0; +- if (adev->asic_type != CHIP_NAVI10) { ++ if (adev->asic_type != CHIP_NAVI10 || adev->asic_type != CHIP_NAVI14) { + *sram_addr_reg_offset = SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_UCODE_ADDR); + *sram_data_reg_offset = SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_UCODE_DATA); + } +-- +2.17.1 + |