diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2634-drm-amdgpu-gfx10-add-placeholder-for-navi14-golden-s.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2634-drm-amdgpu-gfx10-add-placeholder-for-navi14-golden-s.patch | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2634-drm-amdgpu-gfx10-add-placeholder-for-navi14-golden-s.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2634-drm-amdgpu-gfx10-add-placeholder-for-navi14-golden-s.patch new file mode 100644 index 00000000..fd773953 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2634-drm-amdgpu-gfx10-add-placeholder-for-navi14-golden-s.patch @@ -0,0 +1,50 @@ +From ca8752a1039e9e19ddfd57ebb8b7e57bcb77ac2d Mon Sep 17 00:00:00 2001 +From: Xiaojie Yuan <xiaojie.yuan@amd.com> +Date: Mon, 17 Dec 2018 18:17:12 +0800 +Subject: [PATCH 2634/2940] drm/amdgpu/gfx10: add placeholder for navi14 golden + settings + +To be filled in once available. + +Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Jack Xiao <Jack.Xiao@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +index 77efcd213c94..369bd2b11907 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +@@ -116,6 +116,11 @@ static const struct soc15_reg_golden golden_settings_gc_10_0_nv10[] = + /* Pending on emulation bring up */ + }; + ++static const struct soc15_reg_golden golden_settings_gc_10_1_nv14[] = ++{ ++ /* Pending on emulation bring up */ ++}; ++ + static void gfx_v10_0_set_ring_funcs(struct amdgpu_device *adev); + static void gfx_v10_0_set_irq_funcs(struct amdgpu_device *adev); + static void gfx_v10_0_set_gds_init(struct amdgpu_device *adev); +@@ -250,6 +255,14 @@ static void gfx_v10_0_init_golden_registers(struct amdgpu_device *adev) + golden_settings_gc_10_0_nv10, + (const u32)ARRAY_SIZE(golden_settings_gc_10_0_nv10)); + break; ++ case CHIP_NAVI14: ++ soc15_program_register_sequence(adev, ++ golden_settings_gc_10_1, ++ (const u32)ARRAY_SIZE(golden_settings_gc_10_1)); ++ soc15_program_register_sequence(adev, ++ golden_settings_gc_10_1_nv14, ++ (const u32)ARRAY_SIZE(golden_settings_gc_10_1_nv14)); ++ break; + default: + break; + } +-- +2.17.1 + |