diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2629-drm-amdgpu-sdma5-add-placeholder-for-navi14-golden-s.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2629-drm-amdgpu-sdma5-add-placeholder-for-navi14-golden-s.patch | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2629-drm-amdgpu-sdma5-add-placeholder-for-navi14-golden-s.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2629-drm-amdgpu-sdma5-add-placeholder-for-navi14-golden-s.patch new file mode 100644 index 00000000..36975f55 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2629-drm-amdgpu-sdma5-add-placeholder-for-navi14-golden-s.patch @@ -0,0 +1,48 @@ +From be00c6cd0994caaad9329e687d15ebdeea28ba55 Mon Sep 17 00:00:00 2001 +From: Xiaojie Yuan <xiaojie.yuan@amd.com> +Date: Mon, 17 Dec 2018 18:07:22 +0800 +Subject: [PATCH 2629/2940] drm/amdgpu/sdma5: add placeholder for navi14 golden + settings + +To be filled in once they are available. + +Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Jack Xiao <Jack.Xiao@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +index 1be7f3e4d650..caf34dd3c573 100644 +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +@@ -85,6 +85,9 @@ static const struct soc15_reg_golden golden_settings_sdma_5[] = { + static const struct soc15_reg_golden golden_settings_sdma_nv10[] = { + }; + ++static const struct soc15_reg_golden golden_settings_sdma_nv14[] = { ++}; ++ + static u32 sdma_v5_0_get_reg_offset(struct amdgpu_device *adev, u32 instance, u32 internal_offset) + { + u32 base; +@@ -114,6 +117,14 @@ static void sdma_v5_0_init_golden_registers(struct amdgpu_device *adev) + golden_settings_sdma_nv10, + (const u32)ARRAY_SIZE(golden_settings_sdma_nv10)); + break; ++ case CHIP_NAVI14: ++ soc15_program_register_sequence(adev, ++ golden_settings_sdma_5, ++ (const u32)ARRAY_SIZE(golden_settings_sdma_5)); ++ soc15_program_register_sequence(adev, ++ golden_settings_sdma_nv14, ++ (const u32)ARRAY_SIZE(golden_settings_sdma_nv14)); ++ break; + default: + break; + } +-- +2.17.1 + |