diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2601-Revert-drm-amdgpu-Need-to-set-the-baco-cap-before-ba.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2601-Revert-drm-amdgpu-Need-to-set-the-baco-cap-before-ba.patch | 152 |
1 files changed, 152 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2601-Revert-drm-amdgpu-Need-to-set-the-baco-cap-before-ba.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2601-Revert-drm-amdgpu-Need-to-set-the-baco-cap-before-ba.patch new file mode 100644 index 00000000..621a960b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2601-Revert-drm-amdgpu-Need-to-set-the-baco-cap-before-ba.patch @@ -0,0 +1,152 @@ +From 4f156bbb70df592c138eaecef5521db158d927e7 Mon Sep 17 00:00:00 2001 +From: Chaudhary Amit Kumar <Chaudharyamit.Kumar@amd.com> +Date: Tue, 2 Jul 2019 12:37:50 +0530 +Subject: [PATCH 2601/2940] Revert "drm/amdgpu: Need to set the baco cap before + baco reset" + +This reverts commit 40e4d28a131cb670c8aae8c1d98c19bb42589b7e. +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 10 +-------- + .../gpu/drm/amd/include/kgd_pp_interface.h | 1 - + drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 16 -------------- + .../drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 1 - + .../powerplay/hwmgr/vega10_processpptables.c | 22 ------------------- + .../powerplay/hwmgr/vega10_processpptables.h | 1 - + drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 - + 7 files changed, 1 insertion(+), 51 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index 9420523597c2..41a63d35e219 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -2645,15 +2645,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, + /* check if we need to reset the asic + * E.g., driver was not cleanly unloaded previously, etc. + */ +- if (amdgpu_passthrough(adev) && amdgpu_asic_need_reset_on_init(adev)) { +- if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->set_asic_baco_cap) { +- r = adev->powerplay.pp_funcs->set_asic_baco_cap(adev->powerplay.pp_handle); +- if (r) { +- dev_err(adev->dev, "set baco capability failed\n"); +- goto failed; +- } +- } +- ++ if (!amdgpu_sriov_vf(adev) && amdgpu_asic_need_reset_on_init(adev)) { + r = amdgpu_asic_reset(adev); + if (r) { + dev_err(adev->dev, "asic reset on init failed\n"); +diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h +index c6e2a51370b3..9f661bf96ed0 100644 +--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h ++++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h +@@ -296,7 +296,6 @@ struct amd_pm_funcs { + int (*set_hard_min_fclk_by_freq)(void *handle, uint32_t clock); + int (*set_min_deep_sleep_dcefclk)(void *handle, uint32_t clock); + int (*get_asic_baco_capability)(void *handle, bool *cap); +- int (*set_asic_baco_cap)(void *handle); + int (*get_asic_baco_state)(void *handle, int *state); + int (*set_asic_baco_state)(void *handle, int state); + int (*get_ppfeature_status)(void *handle, char *buf); +diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +index 9856760fceb5..bea1587d352d 100644 +--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c ++++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +@@ -1404,21 +1404,6 @@ static int pp_set_active_display_count(void *handle, uint32_t count) + return ret; + } + +-static int pp_set_asic_baco_cap(void *handle) +-{ +- struct pp_hwmgr *hwmgr = handle; +- +- if (!hwmgr) +- return -EINVAL; +- +- if (!hwmgr->pm_en || !hwmgr->hwmgr_func->set_asic_baco_cap) +- return 0; +- +- hwmgr->hwmgr_func->set_asic_baco_cap(hwmgr); +- +- return 0; +-} +- + static int pp_get_asic_baco_capability(void *handle, bool *cap) + { + struct pp_hwmgr *hwmgr = handle; +@@ -1561,7 +1546,6 @@ static const struct amd_pm_funcs pp_dpm_funcs = { + .set_hard_min_dcefclk_by_freq = pp_set_hard_min_dcefclk_by_freq, + .set_hard_min_fclk_by_freq = pp_set_hard_min_fclk_by_freq, + .get_asic_baco_capability = pp_get_asic_baco_capability, +- .set_asic_baco_cap = pp_set_asic_baco_cap, + .get_asic_baco_state = pp_get_asic_baco_state, + .set_asic_baco_state = pp_set_asic_baco_state, + .get_ppfeature_status = pp_get_ppfeature_status, +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +index 11b82c294d91..bc904d1977e3 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +@@ -5302,7 +5302,6 @@ static const struct pp_hwmgr_func vega10_hwmgr_funcs = { + .odn_edit_dpm_table = vega10_odn_edit_dpm_table, + .get_performance_level = vega10_get_performance_level, + .get_asic_baco_capability = smu9_baco_get_capability, +- .set_asic_baco_cap = vega10_baco_set_cap, + .get_asic_baco_state = smu9_baco_get_state, + .set_asic_baco_state = vega10_baco_set_state, + .get_ppfeature_status = vega10_get_ppfeature_status, +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c +index 8fdeb23d2480..b6767d74dc85 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c +@@ -1371,25 +1371,3 @@ int vega10_get_powerplay_table_entry(struct pp_hwmgr *hwmgr, + + return result; + } +- +-int vega10_baco_set_cap(struct pp_hwmgr *hwmgr) +-{ +- int result = 0; +- const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; +- +- powerplay_table = get_powerplay_table(hwmgr); +- +- PP_ASSERT_WITH_CODE((powerplay_table != NULL), +- "Missing PowerPlay Table!", return -1); +- +- result = check_powerplay_tables(hwmgr, powerplay_table); +- +- PP_ASSERT_WITH_CODE((result == 0), +- "check_powerplay_tables failed", return result); +- +- set_hw_cap( +- hwmgr, +- 0 != (le32_to_cpu(powerplay_table->ulPlatformCaps) & ATOM_VEGA10_PP_PLATFORM_CAP_BACO), +- PHM_PlatformCaps_BACO); +- return result; +-} +\ No newline at end of file +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.h b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.h +index da5fbec9b0cd..d83ed2af7aa3 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.h ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.h +@@ -59,5 +59,4 @@ extern int vega10_get_number_of_powerplay_table_entries(struct pp_hwmgr *hwmgr); + extern int vega10_get_powerplay_table_entry(struct pp_hwmgr *hwmgr, uint32_t entry_index, + struct pp_power_state *power_state, int (*call_back_func)(struct pp_hwmgr *, void *, + struct pp_power_state *, void *, uint32_t)); +-extern int vega10_baco_set_cap(struct pp_hwmgr *hwmgr); + #endif +diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +index 0f2cb4f01413..47dbecca5adb 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +@@ -340,7 +340,6 @@ struct pp_hwmgr_func { + int (*set_hard_min_dcefclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock); + int (*set_hard_min_fclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock); + int (*get_asic_baco_capability)(struct pp_hwmgr *hwmgr, bool *cap); +- int (*set_asic_baco_cap)(struct pp_hwmgr *hwmgr); + int (*get_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE *state); + int (*set_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE state); + int (*get_ppfeature_status)(struct pp_hwmgr *hwmgr, char *buf); +-- +2.17.1 + |