1 files changed, 39 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2600-drm-amdgpu-display-switch-udelay-to-msleep.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2600-drm-amdgpu-display-switch-udelay-to-msleep.patch
new file mode 100644
index 00000000..ee3e711a
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2600-drm-amdgpu-display-switch-udelay-to-msleep.patch
@@ -0,0 +1,39 @@
+From ab651415a17565ab9db3f4fa51d5189eb6975c6f Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Tue, 25 Jun 2019 08:54:21 -0500
+Subject: [PATCH 2600/2940] drm/amdgpu/display: switch udelay to msleep
+
+We may need to sleep for up to 80ms
+(8ms per each of up to 10 loop iterations):
+
+/* First DPCD read after VDD ON can fail if the particular board
+ * does not have HPD pin wired correctly. So if DPCD read fails,
+ * which it should never happen, retry a few times. Target worst
+ * case scenario of 80 ms.
+ */
+
+Switch udelay to msleep to avoid limits on arm.
+
+Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
+Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+index 943792729e15..e94d65ad0d90 100644
+--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
++++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+@@ -548,7 +548,7 @@ static void read_edp_current_link_settings_on_detect(struct dc_link *link)
+ 			break;
+ 		}
+ 
+-		udelay(8000);
++		msleep(8);
+ 	}
+ 
+ 	ASSERT(status == DC_OK);
+-- 
+2.17.1
+