diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2584-drm-amd-amdgpu-Fix-style-issues-in-dcn20_resource.c.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2584-drm-amd-amdgpu-Fix-style-issues-in-dcn20_resource.c.patch | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2584-drm-amd-amdgpu-Fix-style-issues-in-dcn20_resource.c.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2584-drm-amd-amdgpu-Fix-style-issues-in-dcn20_resource.c.patch new file mode 100644 index 00000000..4f2fc265 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2584-drm-amd-amdgpu-Fix-style-issues-in-dcn20_resource.c.patch @@ -0,0 +1,45 @@ +From bdb3d0327d895f1c2d42de3f70fbb41bcc1fefea Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ernst=20Sj=C3=B6strand?= <ernstp@gmail.com> +Date: Mon, 24 Jun 2019 17:15:43 +0200 +Subject: [PATCH 2584/2940] drm/amd/amdgpu: Fix style issues in + dcn20_resource.c +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Inconsistent indentation and mixed use of brackets. + +Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +index c5ac25980f19..fa4f378efe5b 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +@@ -2887,15 +2887,15 @@ static bool construct( + dc->caps.force_dp_tps4_for_cp2520 = true; + dc->caps.hw_3d_lut = true; + +- if (dc->ctx->dce_environment == DCE_ENV_PRODUCTION_DRV) ++ if (dc->ctx->dce_environment == DCE_ENV_PRODUCTION_DRV) { + dc->debug = debug_defaults_drv; +- else if (dc->ctx->dce_environment == DCE_ENV_FPGA_MAXIMUS) { +- pool->base.pipe_count = 4; +- ++ } else if (dc->ctx->dce_environment == DCE_ENV_FPGA_MAXIMUS) { ++ pool->base.pipe_count = 4; + pool->base.mpcc_count = pool->base.pipe_count; + dc->debug = debug_defaults_diags; +- } else ++ } else { + dc->debug = debug_defaults_diags; ++ } + //dcn2.0x + dc->work_arounds.dedcn20_305_wa = true; + +-- +2.17.1 + |