diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2562-drm-amd-display-Use-macro-for-invalid-OPP-ID.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2562-drm-amd-display-Use-macro-for-invalid-OPP-ID.patch | 116 |
1 files changed, 116 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2562-drm-amd-display-Use-macro-for-invalid-OPP-ID.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2562-drm-amd-display-Use-macro-for-invalid-OPP-ID.patch new file mode 100644 index 00000000..45b2ff4e --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2562-drm-amd-display-Use-macro-for-invalid-OPP-ID.patch @@ -0,0 +1,116 @@ +From 0e7d856eaf3d561e5bc5983430ae4d3e0a549ee1 Mon Sep 17 00:00:00 2001 +From: Wesley Chalmers <Wesley.Chalmers@amd.com> +Date: Thu, 23 May 2019 11:54:12 -0400 +Subject: [PATCH 2562/2940] drm/amd/display: Use macro for invalid OPP ID + +[WHY] +This is meant to make it clearer that 0xf is not a valid OPP ID, and +that code making use of OPP IDs should not accept this value. + +Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> +Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> +Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 4 ++-- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 4 ++-- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c | 2 +- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 ++-- + drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 2 ++ + 5 files changed, 9 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c +index 3f9ad09769b1..a48d314011a9 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c +@@ -63,7 +63,7 @@ void hubp1_set_blank(struct hubp *hubp, bool blank) + } + + hubp->mpcc_id = 0xf; +- hubp->opp_id = 0xf; ++ hubp->opp_id = OPP_ID_INVALID; + } + } + +@@ -1253,7 +1253,7 @@ void dcn10_hubp_construct( + hubp1->hubp_shift = hubp_shift; + hubp1->hubp_mask = hubp_mask; + hubp1->base.inst = inst; +- hubp1->base.opp_id = 0xf; ++ hubp1->base.opp_id = OPP_ID_INVALID; + hubp1->base.mpcc_id = 0xf; + } + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +index bb422f5e2563..2e692f3eb66f 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +@@ -1085,7 +1085,7 @@ static void dcn10_init_pipes(struct dc *dc, struct dc_state *context) + pipe_ctx->plane_res.dpp = dpp; + pipe_ctx->plane_res.mpcc_inst = dpp->inst; + hubp->mpcc_id = dpp->inst; +- hubp->opp_id = 0xf; ++ hubp->opp_id = OPP_ID_INVALID; + hubp->power_gated = false; + + dc->res_pool->opps[i]->mpc_tree_params.opp_id = dc->res_pool->opps[i]->inst; +@@ -2435,7 +2435,7 @@ static void dcn10_apply_ctx_for_surface( + if (pipe_ctx->plane_state && !old_pipe_ctx->plane_state) { + if (old_pipe_ctx->stream_res.tg == tg && + old_pipe_ctx->plane_res.hubp && +- old_pipe_ctx->plane_res.hubp->opp_id != 0xf) ++ old_pipe_ctx->plane_res.hubp->opp_id != OPP_ID_INVALID) + dcn10_disable_plane(dc, old_pipe_ctx); + } + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c +index 82738f126517..dcba2c5326b2 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c +@@ -694,7 +694,7 @@ bool hubp2_construct( + hubp2->hubp_shift = hubp_shift; + hubp2->hubp_mask = hubp_mask; + hubp2->base.inst = inst; +- hubp2->base.opp_id = 0xf; ++ hubp2->base.opp_id = OPP_ID_INVALID; + hubp2->base.mpcc_id = 0xf; + + return true; +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +index 2cbffe2809b6..d55b15fbfe99 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +@@ -605,7 +605,7 @@ static void dcn20_init_hw(struct dc *dc) + pipe_ctx->plane_res.dpp = dpp; + pipe_ctx->plane_res.mpcc_inst = dpp->inst; + hubp->mpcc_id = dpp->inst; +- hubp->opp_id = 0xf; ++ hubp->opp_id = OPP_ID_INVALID; + hubp->power_gated = false; + pipe_ctx->stream_res.opp = NULL; + +@@ -1307,7 +1307,7 @@ static void dcn20_apply_ctx_for_surface( + if (pipe_ctx->plane_state && !old_pipe_ctx->plane_state) { + if (old_pipe_ctx->stream_res.tg == tg && + old_pipe_ctx->plane_res.hubp && +- old_pipe_ctx->plane_res.hubp->opp_id != 0xf) ++ old_pipe_ctx->plane_res.hubp->opp_id != OPP_ID_INVALID) + dcn20_disable_plane(dc, old_pipe_ctx); + } + +diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h +index fa98c96d0046..342477822dc0 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h +@@ -28,6 +28,8 @@ + + #include "mem_input.h" + ++#define OPP_ID_INVALID 0xf ++ + + enum cursor_pitch { + CURSOR_PITCH_64_PIXELS = 0, +-- +2.17.1 + |