diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2557-drm-amd-display-update-dsc-max_target_bpp-to-16-bpp.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2557-drm-amd-display-update-dsc-max_target_bpp-to-16-bpp.patch | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2557-drm-amd-display-update-dsc-max_target_bpp-to-16-bpp.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2557-drm-amd-display-update-dsc-max_target_bpp-to-16-bpp.patch new file mode 100644 index 00000000..d29da4c2 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2557-drm-amd-display-update-dsc-max_target_bpp-to-16-bpp.patch @@ -0,0 +1,58 @@ +From b433fbf884cacd3fe88baa67407344a1f6d9c61a Mon Sep 17 00:00:00 2001 +From: Wenjing Liu <Wenjing.Liu@amd.com> +Date: Wed, 22 May 2019 11:50:20 -0400 +Subject: [PATCH 2557/2940] drm/amd/display: update dsc max_target_bpp to 16 + bpp + +[why] +According to the latest specs, the max_target bpp sink +can support is 16 bpp. + +[how] +update dsc max_target_bpp to 16 + +Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> +Reviewed-by: Jun Lei <Jun.Lei@amd.com> +Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 9 +-------- + 1 file changed, 1 insertion(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c +index 96b18bb3b1cc..77e7a0f8a527 100644 +--- a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c ++++ b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c +@@ -242,9 +242,6 @@ static bool intersect_dsc_caps( + } + + struct dc_dsc_policy { +- float max_compression_ratio_legacy; +- float sst_compression_legacy; // Maximum quality if 0.0 +- float mst_compression_legacy; + bool use_min_slices_h; + int max_slices_h; // Maximum available if 0 + int num_slices_v; +@@ -274,18 +271,14 @@ static inline uint32_t calc_dsc_bpp_x16(uint32_t stream_bandwidth_kbps, uint32_t + } + + const struct dc_dsc_policy dsc_policy = { +- .max_compression_ratio_legacy = 3.0f, // DSC Policy: Limit compression to 3:1 at most in all cases +- .sst_compression_legacy = 0.0f, // DSC Policy: SST - Maximum quality (0.0) +- .mst_compression_legacy = 3.0f, // DSC Policy: MST - always 3:1 compression + .use_min_slices_h = true, // DSC Policy: Use minimum number of slices that fits the pixel clock + .max_slices_h = 0, // DSC Policy: Use max available slices (in our case 4 for or 8, depending on the mode) +- + /* DSC Policy: Number of vertical slices set to 2 for no particular reason. + * Seems small enough to not affect the quality too much, while still providing some error + * propagation control (which may also help debugging). + */ + .num_slices_v = 16, +- .max_target_bpp = 24, ++ .max_target_bpp = 16, + .min_target_bpp = 8, + }; + +-- +2.17.1 + |