diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2550-drm-amd-display-Fix-incorrect-DML-output_bpp-value.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2550-drm-amd-display-Fix-incorrect-DML-output_bpp-value.patch | 137 |
1 files changed, 137 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2550-drm-amd-display-Fix-incorrect-DML-output_bpp-value.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2550-drm-amd-display-Fix-incorrect-DML-output_bpp-value.patch new file mode 100644 index 00000000..21b54829 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2550-drm-amd-display-Fix-incorrect-DML-output_bpp-value.patch @@ -0,0 +1,137 @@ +From d755cbd02ab140ef7f7c1ae9a6f19304be09aeef Mon Sep 17 00:00:00 2001 +From: Ilya Bakoulin <Ilya.Bakoulin@amd.com> +Date: Fri, 3 May 2019 17:22:32 -0400 +Subject: [PATCH 2550/2940] drm/amd/display: Fix incorrect DML output_bpp value + +[Why] +The output_bpp pipe parameter was assigned an incorrect value +(color depth enum), and subsequently used to overwrite +the OutputBpp parameter calculated by DML. Seems like this had no +effect except with DSC enabled, which would make DML produce +bad outputs. + +[How] +Removed assignment to OutputBpp, fixed output_bpp assignment, +and properly set ForcedOutputLinkBPP instead of OutputBpp. +Also removed condition in DML that prevented forcing of +Output BPP with DSC enabled. + +Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> +Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../drm/amd/display/dc/dcn20/dcn20_resource.c | 40 ++++++++++++++++++- + .../drm/amd/display/dc/dml/display_mode_vba.c | 8 +++- + 2 files changed, 45 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +index d726f36c5e38..d71a0dcf652a 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +@@ -1616,6 +1616,7 @@ int dcn20_populate_dml_pipes_from_context( + + for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { + struct dc_crtc_timing *timing = &res_ctx->pipe_ctx[i].stream->timing; ++ int output_bpc; + + if (!res_ctx->pipe_ctx[i].stream) + continue; +@@ -1665,7 +1666,6 @@ int dcn20_populate_dml_pipes_from_context( + pipes[pipe_cnt].pipe.dest.vtotal_min = res_ctx->pipe_ctx[i].stream->adjust.v_total_min; + pipes[pipe_cnt].pipe.dest.vtotal_max = res_ctx->pipe_ctx[i].stream->adjust.v_total_max; + +- pipes[pipe_cnt].dout.output_bpp = res_ctx->pipe_ctx[i].stream->timing.display_color_depth; + switch (res_ctx->pipe_ctx[i].stream->signal) { + case SIGNAL_TYPE_DISPLAY_PORT_MST: + case SIGNAL_TYPE_DISPLAY_PORT: +@@ -1684,22 +1684,60 @@ int dcn20_populate_dml_pipes_from_context( + pipes[pipe_cnt].dout.output_type = dm_dp; + pipes[pipe_cnt].dout.dp_lanes = 4; + } ++ ++ switch (res_ctx->pipe_ctx[i].stream->timing.display_color_depth) { ++ case COLOR_DEPTH_666: ++ output_bpc = 6; ++ break; ++ case COLOR_DEPTH_888: ++ output_bpc = 8; ++ break; ++ case COLOR_DEPTH_101010: ++ output_bpc = 10; ++ break; ++ case COLOR_DEPTH_121212: ++ output_bpc = 12; ++ break; ++ case COLOR_DEPTH_141414: ++ output_bpc = 14; ++ break; ++ case COLOR_DEPTH_161616: ++ output_bpc = 16; ++ break; ++#ifdef CONFIG_DRM_AMD_DC_DCN2_0 ++ case COLOR_DEPTH_999: ++ output_bpc = 9; ++ break; ++ case COLOR_DEPTH_111111: ++ output_bpc = 11; ++ break; ++#endif ++ default: ++ output_bpc = 8; ++ break; ++ } ++ ++ + switch (res_ctx->pipe_ctx[i].stream->timing.pixel_encoding) { + case PIXEL_ENCODING_RGB: + case PIXEL_ENCODING_YCBCR444: + pipes[pipe_cnt].dout.output_format = dm_444; ++ pipes[pipe_cnt].dout.output_bpp = output_bpc * 3; + break; + case PIXEL_ENCODING_YCBCR420: + pipes[pipe_cnt].dout.output_format = dm_420; ++ pipes[pipe_cnt].dout.output_bpp = (output_bpc * 3) / 2; + break; + case PIXEL_ENCODING_YCBCR422: + if (true) /* todo */ + pipes[pipe_cnt].dout.output_format = dm_s422; + else + pipes[pipe_cnt].dout.output_format = dm_n422; ++ pipes[pipe_cnt].dout.output_bpp = output_bpc * 2; + break; + default: + pipes[pipe_cnt].dout.output_format = dm_444; ++ pipes[pipe_cnt].dout.output_bpp = output_bpc * 3; + } + pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].pipe_idx; + if (res_ctx->pipe_ctx[i].top_pipe && res_ctx->pipe_ctx[i].top_pipe->plane_state +diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +index a21608cd67ef..4d2a1262d9db 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c ++++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +@@ -427,7 +427,12 @@ static void fetch_pipe_params(struct display_mode_lib *mode_lib) + (enum output_format_class) (dout->output_format); + mode_lib->vba.Output[mode_lib->vba.NumberOfActivePlanes] = + (enum output_encoder_class) (dout->output_type); +- mode_lib->vba.OutputBpp[mode_lib->vba.NumberOfActivePlanes] = dout->output_bpp; ++ ++ if (!dout->dsc_enable) ++ mode_lib->vba.ForcedOutputLinkBPP[mode_lib->vba.NumberOfActivePlanes] = dout->output_bpp; ++ else ++ mode_lib->vba.ForcedOutputLinkBPP[mode_lib->vba.NumberOfActivePlanes] = 0.0; ++ + mode_lib->vba.OutputLinkDPLanes[mode_lib->vba.NumberOfActivePlanes] = + dout->dp_lanes; + /* TODO: Needs to be set based on dout->audio.audio_sample_rate_khz/sample_layout */ +@@ -436,7 +441,6 @@ static void fetch_pipe_params(struct display_mode_lib *mode_lib) + mode_lib->vba.AudioSampleLayout[mode_lib->vba.NumberOfActivePlanes] = + 1; + mode_lib->vba.DRAMClockChangeLatencyOverride = 0.0; +- + mode_lib->vba.DSCEnabled[mode_lib->vba.NumberOfActivePlanes] = dout->dsc_enable; + mode_lib->vba.NumberOfDSCSlices[mode_lib->vba.NumberOfActivePlanes] = + dout->dsc_slices; +-- +2.17.1 + |