diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2503-drm-amd-display-Change-Min-fclk-to-1.2Ghz.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2503-drm-amd-display-Change-Min-fclk-to-1.2Ghz.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2503-drm-amd-display-Change-Min-fclk-to-1.2Ghz.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2503-drm-amd-display-Change-Min-fclk-to-1.2Ghz.patch new file mode 100644 index 00000000..3c26d26b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2503-drm-amd-display-Change-Min-fclk-to-1.2Ghz.patch @@ -0,0 +1,40 @@ +From 94352c1447fbaa681cfe1fffa1efe3e5fda02018 Mon Sep 17 00:00:00 2001 +From: Tyler DiBattista <tyler.dibattista@amd.com> +Date: Mon, 1 Apr 2019 15:20:44 -0400 +Subject: [PATCH 2503/2940] drm/amd/display: Change Min fclk to 1.2Ghz + +[Why] +Some nightly tests are failing since the new value for fclk is a +bit too low. Also, a new test for the maximum downscale case was +needed. + +[How] +Updated the default value for fclk to be 1.2GHz. + +Signed-off-by: Tyler DiBattista <tyler.dibattista@amd.com> +Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> +Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +Acked-by: Tony Cheng <Tony.Cheng@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c +index c1511c9edd48..de471ca87ed7 100644 +--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c ++++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c +@@ -249,8 +249,8 @@ void dcn2_update_clocks_fpga(struct clk_mgr *clk_mgr, + bool safe_to_lower) + { + struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; +- /* Min fclk = 1GHz since all the extra scemi logic seems to run off of it */ +- int fclk_adj = new_clocks->fclk_khz > 1000000 ? new_clocks->fclk_khz : 1000000; ++ /* Min fclk = 1.2GHz since all the extra scemi logic seems to run off of it */ ++ int fclk_adj = new_clocks->fclk_khz > 1200000 ? new_clocks->fclk_khz : 1200000; + + if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr->clks.phyclk_khz)) { + clk_mgr->clks.phyclk_khz = new_clocks->phyclk_khz; +-- +2.17.1 + |