diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2487-drm-amd-display-move-dsc-clock-from-plane_resource-t.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2487-drm-amd-display-move-dsc-clock-from-plane_resource-t.patch | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2487-drm-amd-display-move-dsc-clock-from-plane_resource-t.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2487-drm-amd-display-move-dsc-clock-from-plane_resource-t.patch new file mode 100644 index 00000000..ab38d1f4 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2487-drm-amd-display-move-dsc-clock-from-plane_resource-t.patch @@ -0,0 +1,53 @@ +From 334178dee0cccc0d5e5e58510096bd055883cb07 Mon Sep 17 00:00:00 2001 +From: Tony Cheng <tony.cheng@amd.com> +Date: Fri, 22 Mar 2019 14:22:07 -0400 +Subject: [PATCH 2487/2940] drm/amd/display: move dsc clock from plane_resource + to stream_resource + +Signed-off-by: Tony Cheng <tony.cheng@amd.com> +Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +- + drivers/gpu/drm/amd/display/dc/inc/core_types.h | 5 ++--- + 2 files changed, 3 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +index 33f1a1d972a9..aa04df64522f 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +@@ -2204,7 +2204,7 @@ bool dcn20_validate_bandwidth(struct dc *dc, + context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz = + pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; + #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT +- context->res_ctx.pipe_ctx[i].plane_res.bw.dscclk_khz = ++ context->res_ctx.pipe_ctx[i].stream_res.dscclk_khz = + context->bw_ctx.dml.vba.DSCCLK_calculated[pipe_idx] * 1000; + #endif + context->res_ctx.pipe_ctx[i].pipe_dlg_param = pipes[pipe_idx].pipe.dest; +diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h +index 2d551a6848f5..e94f3c180144 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h +@@ -222,15 +222,14 @@ struct resource_pool { + + struct dcn_fe_bandwidth { + int dppclk_khz; +-#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT +- int dscclk_khz; +-#endif ++ + }; + + struct stream_resource { + struct output_pixel_processor *opp; + #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT + struct display_stream_compressor *dsc; ++ int dscclk_khz; + #endif + struct timing_generator *tg; + struct stream_encoder *stream_enc; +-- +2.17.1 + |