diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2477-drm-amd-display-clean-up-validation-failure-log-spam.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2477-drm-amd-display-clean-up-validation-failure-log-spam.patch | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2477-drm-amd-display-clean-up-validation-failure-log-spam.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2477-drm-amd-display-clean-up-validation-failure-log-spam.patch new file mode 100644 index 00000000..8d8d6086 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2477-drm-amd-display-clean-up-validation-failure-log-spam.patch @@ -0,0 +1,67 @@ +From 173cf2759bb19fd7d13811d162e5f10e4145b8de Mon Sep 17 00:00:00 2001 +From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Date: Mon, 18 Mar 2019 18:20:56 -0400 +Subject: [PATCH 2477/2940] drm/amd/display: clean up validation failure log + spam + +Currently dcn2+ validation will unconditionally print a failure +reason before validation completes. This change categorizes the +failure reason as a warning log and only prints at the end of +validation resolving false positives. + +Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 3 +++ + .../gpu/drm/amd/display/dc/dml/display_mode_vba.c | 12 +----------- + 2 files changed, 4 insertions(+), 11 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +index e2a6e80013f3..49114d823240 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +@@ -1880,6 +1880,7 @@ bool dcn20_validate_bandwidth(struct dc *dc, + int split_threshold = dc->res_pool->pipe_count / 2; + bool avoid_split = dc->debug.pipe_split_policy != MPC_SPLIT_DYNAMIC; + display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_KERNEL); ++ DC_LOGGER_INIT(dc->ctx->logger); + + ASSERT(pipes); + if (!pipes) +@@ -2183,6 +2184,8 @@ bool dcn20_validate_bandwidth(struct dc *dc, + return true; + + validate_fail: ++ DC_LOG_WARNING("Mode Validation Warning: %s failed validation.\n", ++ dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states])); + kfree(pipes); + return false; + } +diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +index 3560319a5c6f..7f3ea740bfe8 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c ++++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +@@ -73,17 +73,7 @@ unsigned int dml_get_voltage_level( + fetch_pipe_params(mode_lib); + PixelClockAdjustmentForProgressiveToInterlaceUnit(mode_lib); + } +- mode_lib->funcs.validate(mode_lib); +- +- /* check if Mode Support Validation failed */ +- if (mode_lib->vba.VoltageLevel > mode_lib->vba.soc.num_states) { +- /* get the validation status for highest voltage level and output console message */ +- enum dm_validation_status status = mode_lib->vba.ValidationStatus[mode_lib->vba.soc.num_states]; +- if (status != DML_FAIL_PITCH_SUPPORT) { +- /*AlignedYPitch is based on swizzle mode, so it is normal if some swizzle mode not supported*/ +- dm_output_to_console("Mode Validation Error: %s failed validation.\n", dml_get_status_message(status)); +- } +- } ++ mode_lib->funcs.validate(mode_lib); + + return mode_lib->vba.VoltageLevel; + } +-- +2.17.1 + |