aboutsummaryrefslogtreecommitdiffstats
path: root/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2471-drm-amd-display-skip-dsc-config-for-navi10-bring-up.patch
diff options
context:
space:
mode:
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2471-drm-amd-display-skip-dsc-config-for-navi10-bring-up.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2471-drm-amd-display-skip-dsc-config-for-navi10-bring-up.patch52
1 files changed, 52 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2471-drm-amd-display-skip-dsc-config-for-navi10-bring-up.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2471-drm-amd-display-skip-dsc-config-for-navi10-bring-up.patch
new file mode 100644
index 00000000..64e43725
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2471-drm-amd-display-skip-dsc-config-for-navi10-bring-up.patch
@@ -0,0 +1,52 @@
+From 1611b079be1f87752bad7b32de52a66e741ef6e9 Mon Sep 17 00:00:00 2001
+From: hersen wu <hersenxs.wu@amd.com>
+Date: Wed, 13 Mar 2019 16:21:26 -0400
+Subject: [PATCH 2471/2940] drm/amd/display: skip dsc config for navi10 bring
+ up
+
+[why] we meet a bug when program dsc register even dsc mode is not
+enabled. disable dsc config for now. we will re-visit this issue.
+
+Signed-off-by: hersen wu <hersenxs.wu@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c | 9 +++++++++
+ drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +-
+ 2 files changed, 10 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
+index 724b5a9e47d0..34f5a7d671b2 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
+@@ -191,6 +191,15 @@ void optc2_set_dsc_config(struct timing_generator *optc,
+ uint32_t dsc_slice_width)
+ {
+ struct optc *optc1 = DCN10TG_FROM_TG(optc);
++ uint32_t data_format = 0;
++ /* skip if dsc mode is not changed */
++ data_format = dm_read_reg(CTX, REG(OPTC_DATA_FORMAT_CONTROL));
++
++ data_format = data_format & 0x30; /* bit5:4 */
++ data_format = data_format >> 4;
++
++ if (data_format == dsc_mode)
++ return;
+
+ REG_UPDATE(OPTC_DATA_FORMAT_CONTROL,
+ OPTC_DSC_MODE, dsc_mode);
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+index c4fa0b9e7138..e2a6e80013f3 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+@@ -670,7 +670,7 @@ static const struct dc_debug_options debug_defaults_drv = {
+ .max_downscale_src_width = 5120,/*upto 5K*/
+ .disable_pplib_wm_range = false,
+ .scl_reset_length10 = true,
+- .sanity_checks = true,
++ .sanity_checks = false,
+ .disable_tri_buf = true,
+ };
+
+--
+2.17.1
+