diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2448-drm-amd-powrplay-add-interface-for-dc-to-get-max-clo.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2448-drm-amd-powrplay-add-interface-for-dc-to-get-max-clo.patch | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2448-drm-amd-powrplay-add-interface-for-dc-to-get-max-clo.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2448-drm-amd-powrplay-add-interface-for-dc-to-get-max-clo.patch new file mode 100644 index 00000000..86e29fb6 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2448-drm-amd-powrplay-add-interface-for-dc-to-get-max-clo.patch @@ -0,0 +1,98 @@ +From 1c43d279686ae465049de491cf6132fcad5c83cd Mon Sep 17 00:00:00 2001 +From: hersen wu <hersenxs.wu@amd.com> +Date: Tue, 21 May 2019 13:07:57 -0400 +Subject: [PATCH 2448/2940] drm/amd/powrplay: add interface for dc to get max + clock values + +dc (display component) needs maximum clock values of uclock, +socclk, dcefclk, to calculate display bandwidth. + +Signed-off-by: hersen wu <hersenxs.wu@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +--- + .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 4 +++ + drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 31 +++++++++++++++++++ + 2 files changed, 35 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +index a8e5f4d69861..c748821ef766 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +@@ -25,6 +25,7 @@ + #include "amdgpu.h" + #include "kgd_pp_interface.h" + #include "dm_pp_interface.h" ++#include "dm_pp_smu.h" + + #define SMU_THERMAL_MINIMUM_ALERT_TEMP 0 + #define SMU_THERMAL_MAXIMUM_ALERT_TEMP 255 +@@ -678,6 +679,7 @@ struct smu_funcs + int (*gfx_off_control)(struct smu_context *smu, bool enable); + int (*register_irq_handler)(struct smu_context *smu); + int (*set_azalia_d3_pme)(struct smu_context *smu); ++ int (*get_max_sustainable_clocks_by_dc)(struct smu_context *smu, struct pp_smu_nv_clock_table *max_clocks); + }; + + #define smu_init_microcode(smu) \ +@@ -884,6 +886,8 @@ struct smu_funcs + ((smu)->funcs->set_azalia_d3_pme ? (smu)->funcs->set_azalia_d3_pme((smu)) : 0) + #define smu_get_uclk_dpm_states(smu, clocks_in_khz, num_states) \ + ((smu)->ppt_funcs->get_uclk_dpm_states ? (smu)->ppt_funcs->get_uclk_dpm_states((smu), (clocks_in_khz), (num_states)) : 0) ++#define smu_get_max_sustainable_clocks_by_dc(smu, max_clocks) \ ++ ((smu)->funcs->get_max_sustainable_clocks_by_dc ? (smu)->funcs->get_max_sustainable_clocks_by_dc((smu), (max_clocks)) : 0) + + extern int smu_get_atom_data_table(struct smu_context *smu, uint32_t table, + uint16_t *size, uint8_t *frev, uint8_t *crev, +diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +index caf6c9847c0f..631ee8460e38 100644 +--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c ++++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +@@ -1597,6 +1597,36 @@ static int smu_v11_0_register_irq_handler(struct smu_context *smu) + return ret; + } + ++static int smu_v11_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu, ++ struct pp_smu_nv_clock_table *max_clocks) ++{ ++ struct smu_table_context *table_context = &smu->smu_table; ++ struct smu_11_0_max_sustainable_clocks *sustainable_clocks = NULL; ++ ++ if (!max_clocks || !table_context->max_sustainable_clocks ) ++ return -EINVAL; ++ ++ sustainable_clocks = table_context->max_sustainable_clocks; ++ ++ max_clocks->dcfClockInKhz = ++ (unsigned int) sustainable_clocks->dcef_clock * 1000; ++ max_clocks->displayClockInKhz = ++ (unsigned int) sustainable_clocks->display_clock * 1000; ++ max_clocks->phyClockInKhz = ++ (unsigned int) sustainable_clocks->phy_clock * 1000; ++ max_clocks->pixelClockInKhz = ++ (unsigned int) sustainable_clocks->pixel_clock * 1000; ++ max_clocks->uClockInKhz = ++ (unsigned int) sustainable_clocks->uclock * 1000; ++ max_clocks->socClockInKhz = ++ (unsigned int) sustainable_clocks->soc_clock * 1000; ++ max_clocks->dscClockInKhz = 0; ++ max_clocks->dppClockInKhz = 0; ++ max_clocks->fabricClockInKhz = 0; ++ ++ return 0; ++} ++ + static int smu_v11_0_set_azalia_d3_pme(struct smu_context *smu) + { + int ret = 0; +@@ -1655,6 +1685,7 @@ static const struct smu_funcs smu_v11_0_funcs = { + .gfx_off_control = smu_v11_0_gfx_off_control, + .register_irq_handler = smu_v11_0_register_irq_handler, + .set_azalia_d3_pme = smu_v11_0_set_azalia_d3_pme, ++ .get_max_sustainable_clocks_by_dc = smu_v11_0_get_max_sustainable_clocks_by_dc, + }; + + void smu_v11_0_set_smu_funcs(struct smu_context *smu) +-- +2.17.1 + |