diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2419-drm-amd-powerplay-use-pp_feature_mask-to-control-ucl.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2419-drm-amd-powerplay-use-pp_feature_mask-to-control-ucl.patch | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2419-drm-amd-powerplay-use-pp_feature_mask-to-control-ucl.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2419-drm-amd-powerplay-use-pp_feature_mask-to-control-ucl.patch new file mode 100644 index 00000000..ee04959f --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2419-drm-amd-powerplay-use-pp_feature_mask-to-control-ucl.patch @@ -0,0 +1,45 @@ +From 63c30fca07dbfd11e81d1f7127c6aad7af3e7dd8 Mon Sep 17 00:00:00 2001 +From: Kevin Wang <kevin1.wang@amd.com> +Date: Thu, 30 May 2019 10:28:11 +0800 +Subject: [PATCH 2419/2940] drm/amd/powerplay: use pp_feature_mask to control + uclk(mclk) dpm enabled + +the uclk dpm feature is not work well on all navi10 asic, +use pp feature mask module parameter to control it. + +Signed-off-by: Kevin Wang <kevin1.wang@amd.com> +Reviewed-by: Jack Xiao <Jack.Xiao@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +index af0abed6169e..c4bd14ab2add 100644 +--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c ++++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +@@ -315,9 +315,6 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, + | FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) + | FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT) + | FEATURE_MASK(FEATURE_DPM_LINK_BIT) +- | FEATURE_MASK(FEATURE_DPM_UCLK_BIT) +- | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT) +- | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT) + | FEATURE_MASK(FEATURE_GFX_ULV_BIT) + | FEATURE_MASK(FEATURE_RSMU_SMN_CG_BIT) + | FEATURE_MASK(FEATURE_DS_SOCCLK_BIT) +@@ -336,6 +333,11 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, + | FEATURE_MASK(FEATURE_FW_DSTATE_BIT) + | FEATURE_MASK(FEATURE_ACDC_BIT); + ++ if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) ++ *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT) ++ | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT) ++ | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT); ++ + if (adev->pm.pp_feature & PP_GFXOFF_MASK) { + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_SS_BIT) + | FEATURE_MASK(FEATURE_GFXOFF_BIT); +-- +2.17.1 + |