diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2397-drm-amd-powerplay-fix-clk-type-name-error-OD_SCLK-OD.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2397-drm-amd-powerplay-fix-clk-type-name-error-OD_SCLK-OD.patch | 92 |
1 files changed, 92 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2397-drm-amd-powerplay-fix-clk-type-name-error-OD_SCLK-OD.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2397-drm-amd-powerplay-fix-clk-type-name-error-OD_SCLK-OD.patch new file mode 100644 index 00000000..469b7e23 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2397-drm-amd-powerplay-fix-clk-type-name-error-OD_SCLK-OD.patch @@ -0,0 +1,92 @@ +From 1a93f9442a1387e58b9215d5798c4dc381d08770 Mon Sep 17 00:00:00 2001 +From: Kevin Wang <kevin1.wang@amd.com> +Date: Thu, 16 May 2019 18:24:08 +0800 +Subject: [PATCH 2397/2940] drm/amd/powerplay: fix clk type name error OD_SCLK + OD_MCLK + +use sw-smu clk type name to replace legacy clk type name + +Signed-off-by: Kevin Wang <kevin1.wang@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 4 ++-- + drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 16 ++++++++-------- + 2 files changed, 10 insertions(+), 10 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +index ccb41fc4f74f..3936e81582de 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +@@ -564,9 +564,9 @@ struct pptable_funcs { + int (*update_specified_od8_value)(struct smu_context *smu, + uint32_t index, + uint32_t value); +- int (*get_od_percentage)(struct smu_context *smu, enum pp_clock_type type); ++ int (*get_od_percentage)(struct smu_context *smu, enum smu_clk_type clk_type); + int (*set_od_percentage)(struct smu_context *smu, +- enum pp_clock_type type, ++ enum smu_clk_type clk_type, + uint32_t value); + int (*od_edit_dpm_table)(struct smu_context *smu, + enum PP_OD_DPM_TABLE_COMMAND type, +diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c +index 1d91739d18e0..e6925e09ba19 100644 +--- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c ++++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c +@@ -1690,7 +1690,7 @@ static int vega20_get_metrics_table(struct smu_context *smu, + return ret; + } + static int vega20_get_od_percentage(struct smu_context *smu, +- enum pp_clock_type type) ++ enum smu_clk_type clk_type) + { + struct smu_dpm_context *smu_dpm = &smu->smu_dpm; + struct vega20_dpm_table *dpm_table = NULL; +@@ -1702,12 +1702,12 @@ static int vega20_get_od_percentage(struct smu_context *smu, + dpm_table = smu_dpm->dpm_context; + golden_table = smu_dpm->golden_dpm_context; + +- switch (type) { +- case OD_SCLK: ++ switch (clk_type) { ++ case SMU_OD_SCLK: + single_dpm_table = &(dpm_table->gfx_table); + golden_dpm_table = &(golden_table->gfx_table); + break; +- case OD_MCLK: ++ case SMU_OD_MCLK: + single_dpm_table = &(dpm_table->mem_table); + golden_dpm_table = &(golden_table->mem_table); + break; +@@ -2447,7 +2447,7 @@ static int vega20_update_specified_od8_value(struct smu_context *smu, + } + + static int vega20_set_od_percentage(struct smu_context *smu, +- enum pp_clock_type type, ++ enum smu_clk_type clk_type, + uint32_t value) + { + struct smu_dpm_context *smu_dpm = &smu->smu_dpm; +@@ -2465,15 +2465,15 @@ static int vega20_set_od_percentage(struct smu_context *smu, + dpm_table = smu_dpm->dpm_context; + golden_table = smu_dpm->golden_dpm_context; + +- switch (type) { +- case OD_SCLK: ++ switch (clk_type) { ++ case SMU_OD_SCLK: + single_dpm_table = &(dpm_table->gfx_table); + golden_dpm_table = &(golden_table->gfx_table); + feature_enabled = smu_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT); + clk_id = PPCLK_GFXCLK; + index = OD8_SETTING_GFXCLK_FMAX; + break; +- case OD_MCLK: ++ case SMU_OD_MCLK: + single_dpm_table = &(dpm_table->mem_table); + golden_dpm_table = &(golden_table->mem_table); + feature_enabled = smu_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT); +-- +2.17.1 + |