diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2380-drm-amd-powerplay-move-power_dpm_force_performance_l.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2380-drm-amd-powerplay-move-power_dpm_force_performance_l.patch | 164 |
1 files changed, 164 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2380-drm-amd-powerplay-move-power_dpm_force_performance_l.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2380-drm-amd-powerplay-move-power_dpm_force_performance_l.patch new file mode 100644 index 00000000..f4840a49 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2380-drm-amd-powerplay-move-power_dpm_force_performance_l.patch @@ -0,0 +1,164 @@ +From 29bae31795faacf35e29a0b2bf13346c877d012f Mon Sep 17 00:00:00 2001 +From: Kevin Wang <kevin1.wang@amd.com> +Date: Wed, 15 May 2019 12:59:58 +0800 +Subject: [PATCH 2380/2940] drm/amd/powerplay: move + power_dpm_force_performance_level to amdgpu_smu file + +because this callback is not asic related function, so move it to top +code level to support more asic (eg: navi10) + +Signed-off-by: Kevin Wang <kevin1.wang@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 41 ++++++++++++++++++ + .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 8 +--- + drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 42 ------------------- + 3 files changed, 43 insertions(+), 48 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +index cff17a2ddca3..bca863e80398 100644 +--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c ++++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +@@ -1404,6 +1404,47 @@ int smu_handle_task(struct smu_context *smu, + return ret; + } + ++enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu) ++{ ++ struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); ++ ++ if (!smu_dpm_ctx->dpm_context) ++ return -EINVAL; ++ ++ mutex_lock(&(smu->mutex)); ++ if (smu_dpm_ctx->dpm_level != smu_dpm_ctx->saved_dpm_level) { ++ smu_dpm_ctx->saved_dpm_level = smu_dpm_ctx->dpm_level; ++ } ++ mutex_unlock(&(smu->mutex)); ++ ++ return smu_dpm_ctx->dpm_level; ++} ++ ++int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) ++{ ++ int ret = 0; ++ int i; ++ struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); ++ ++ if (!smu_dpm_ctx->dpm_context) ++ return -EINVAL; ++ ++ for (i = 0; i < smu->adev->num_ip_blocks; i++) { ++ if (smu->adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC) ++ break; ++ } ++ ++ mutex_lock(&smu->mutex); ++ ++ smu->adev->ip_blocks[i].version->funcs->enable_umd_pstate(smu, &level); ++ ret = smu_handle_task(smu, level, ++ AMD_PP_TASK_READJUST_POWER_STATE); ++ ++ mutex_unlock(&smu->mutex); ++ ++ return ret; ++} ++ + const struct amd_ip_funcs smu_ip_funcs = { + .name = "smu", + .early_init = smu_early_init, +diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +index 69c33d707d8f..4706eaf39cf7 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +@@ -570,8 +570,6 @@ struct pptable_funcs { + *clocks); + int (*get_power_profile_mode)(struct smu_context *smu, char *buf); + int (*set_power_profile_mode)(struct smu_context *smu, long *input, uint32_t size); +- enum amd_dpm_forced_level (*get_performance_level)(struct smu_context *smu); +- int (*force_performance_level)(struct smu_context *smu, enum amd_dpm_forced_level level); + int (*dpm_set_uvd_enable)(struct smu_context *smu, bool enable); + int (*dpm_set_vce_enable)(struct smu_context *smu, bool enable); + int (*read_sensor)(struct smu_context *smu, enum amd_pp_sensors sensor, +@@ -798,10 +796,6 @@ struct smu_funcs + ((smu)->ppt_funcs->get_power_profile_mode ? (smu)->ppt_funcs->get_power_profile_mode((smu), buf) : 0) + #define smu_set_power_profile_mode(smu, param, param_size) \ + ((smu)->ppt_funcs->set_power_profile_mode ? (smu)->ppt_funcs->set_power_profile_mode((smu), (param), (param_size)) : 0) +-#define smu_get_performance_level(smu) \ +- ((smu)->ppt_funcs->get_performance_level ? (smu)->ppt_funcs->get_performance_level((smu)) : 0) +-#define smu_force_performance_level(smu, level) \ +- ((smu)->ppt_funcs->force_performance_level ? (smu)->ppt_funcs->force_performance_level((smu), (level)) : 0) + #define smu_pre_display_config_changed(smu) \ + ((smu)->ppt_funcs->pre_display_config_changed ? (smu)->ppt_funcs->pre_display_config_changed((smu)) : 0) + #define smu_display_config_changed(smu) \ +@@ -939,4 +933,6 @@ int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, + uint32_t min, uint32_t max); + int smu_set_hard_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, + uint32_t min, uint32_t max); ++enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu); ++int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level); + #endif +diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c +index 53e8b59f8879..81fb5b5d76be 100644 +--- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c ++++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c +@@ -2334,46 +2334,6 @@ static int vega20_unforce_dpm_levels(struct smu_context *smu) + return ret; + } + +-static enum amd_dpm_forced_level vega20_get_performance_level(struct smu_context *smu) +-{ +- struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); +- if (!smu_dpm_ctx->dpm_context) +- return -EINVAL; +- +- if (smu_dpm_ctx->dpm_level != smu_dpm_ctx->saved_dpm_level) { +- mutex_lock(&(smu->mutex)); +- smu_dpm_ctx->saved_dpm_level = smu_dpm_ctx->dpm_level; +- mutex_unlock(&(smu->mutex)); +- } +- return smu_dpm_ctx->dpm_level; +-} +- +-static int +-vega20_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) +-{ +- int ret = 0; +- int i; +- struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); +- +- if (!smu_dpm_ctx->dpm_context) +- return -EINVAL; +- +- for (i = 0; i < smu->adev->num_ip_blocks; i++) { +- if (smu->adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC) +- break; +- } +- +- mutex_lock(&smu->mutex); +- +- smu->adev->ip_blocks[i].version->funcs->enable_umd_pstate(smu, &level); +- ret = smu_handle_task(smu, level, +- AMD_PP_TASK_READJUST_POWER_STATE); +- +- mutex_unlock(&smu->mutex); +- +- return ret; +-} +- + static int vega20_update_specified_od8_value(struct smu_context *smu, + uint32_t index, + uint32_t value) +@@ -3129,8 +3089,6 @@ static const struct pptable_funcs vega20_ppt_funcs = { + .get_od_percentage = vega20_get_od_percentage, + .get_power_profile_mode = vega20_get_power_profile_mode, + .set_power_profile_mode = vega20_set_power_profile_mode, +- .get_performance_level = vega20_get_performance_level, +- .force_performance_level = vega20_force_performance_level, + .update_specified_od8_value = vega20_update_specified_od8_value, + .set_od_percentage = vega20_set_od_percentage, + .od_edit_dpm_table = vega20_odn_edit_dpm_table, +-- +2.17.1 + |