diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2379-drm-amd-powerplay-enable-uclk-dpm-default-on-navi10.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2379-drm-amd-powerplay-enable-uclk-dpm-default-on-navi10.patch | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2379-drm-amd-powerplay-enable-uclk-dpm-default-on-navi10.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2379-drm-amd-powerplay-enable-uclk-dpm-default-on-navi10.patch new file mode 100644 index 00000000..3a6336ff --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2379-drm-amd-powerplay-enable-uclk-dpm-default-on-navi10.patch @@ -0,0 +1,55 @@ +From 7f2e59a2346c41f96c0044f7f1be2338f5423beb Mon Sep 17 00:00:00 2001 +From: Kevin Wang <kevin1.wang@amd.com> +Date: Thu, 16 May 2019 15:06:25 +0800 +Subject: [PATCH 2379/2940] drm/amd/powerplay: enable uclk dpm default on + navi10 + +enable uclk (mclk) dpm by default on navi10 + +Signed-off-by: Kevin Wang <kevin1.wang@amd.com> +Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +index 2a85ef476a1d..d20d498af675 100644 +--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c ++++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +@@ -314,6 +314,9 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, + | FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) + | FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT) + | FEATURE_MASK(FEATURE_DPM_LINK_BIT) ++ | FEATURE_MASK(FEATURE_DPM_UCLK_BIT) ++ | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT) ++ | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT) + | FEATURE_MASK(FEATURE_GFX_ULV_BIT) + | FEATURE_MASK(FEATURE_RSMU_SMN_CG_BIT) + | FEATURE_MASK(FEATURE_DS_SOCCLK_BIT) +@@ -332,11 +335,6 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, + | FEATURE_MASK(FEATURE_FW_DSTATE_BIT) + | FEATURE_MASK(FEATURE_ACDC_BIT); + +- if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) +- *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT) +- | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT) +- | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT); +- + if (adev->pm.pp_feature & PP_GFXOFF_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_SS_BIT) + | FEATURE_MASK(FEATURE_GFXOFF_BIT); +@@ -350,7 +348,9 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, + if ((adev->asic_type == CHIP_NAVI10) && + (adev->rev_id == 0)) { + *(uint64_t *)feature_mask &= +- ~FEATURE_MASK(FEATURE_DPM_UCLK_BIT); ++ ~(FEATURE_MASK(FEATURE_DPM_UCLK_BIT) ++ | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT) ++ | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT)); + *(uint64_t *)feature_mask &= + ~FEATURE_MASK(FEATURE_DS_SOCCLK_BIT); + } +-- +2.17.1 + |