diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2373-drm-amd-powerplay-smu11-add-secure-board-check-funct.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2373-drm-amd-powerplay-smu11-add-secure-board-check-funct.patch | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2373-drm-amd-powerplay-smu11-add-secure-board-check-funct.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2373-drm-amd-powerplay-smu11-add-secure-board-check-funct.patch new file mode 100644 index 00000000..91c98ac9 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2373-drm-amd-powerplay-smu11-add-secure-board-check-funct.patch @@ -0,0 +1,56 @@ +From 5def3bdba57a9cf20948d80f6aa4ecaa219f7cdf Mon Sep 17 00:00:00 2001 +From: Tao Zhou <tao.zhou1@amd.com> +Date: Fri, 10 May 2019 16:31:57 +0800 +Subject: [PATCH 2373/2940] drm/amd/powerplay/smu11: add secure board check + function (v2) + +To determine whether the board is secure or not. + +v2: rebase (Alex) + +Signed-off-by: Tao Zhou <tao.zhou1@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Kevin Wang <kevin1.wang@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +index f1f920234dbd..253830f3c307 100644 +--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c ++++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +@@ -35,6 +35,8 @@ + #include "smu_v11_0_pptable.h" + #include "smu_v11_0_ppsmc.h" + ++#include "asic_reg/mp/mp_11_0_sh_mask.h" ++ + #define FEATURE_MASK(feature) (1UL << feature) + #define SMC_DPM_FEATURE ( \ + FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) | \ +@@ -281,6 +283,21 @@ static int navi10_get_workload_type(struct smu_context *smu, enum PP_SMC_POWER_P + return val; + } + ++static bool is_asic_secure(struct smu_context *smu) ++{ ++ struct amdgpu_device *adev = smu->adev; ++ bool is_secure = true; ++ uint32_t mp0_fw_intf; ++ ++ mp0_fw_intf = RREG32_PCIE(MP0_Public | ++ (smnMP0_FW_INTF & 0xffffffff)); ++ ++ if (!(mp0_fw_intf & (1 << 19))) ++ is_secure = false; ++ ++ return is_secure; ++} ++ + static int + navi10_get_allowed_feature_mask(struct smu_context *smu, + uint32_t *feature_mask, uint32_t num) +-- +2.17.1 + |